Patents by Inventor Yasunori Nakazaki

Yasunori Nakazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5210598
    Abstract: A semiconductor element chiefly serving as an anti fuse and a manufacturing method thereof, the anti fuse storing data by causing a transition from a high resistance state to a low resistance state by a current supplied when a voltage is imposed. The element has a three-layer electrode structure composed of an upper electrode, amorphous silicon and a silicon insulation film thereby to improve the stability and reproducibility of the programming voltage and current.
    Type: Grant
    Filed: October 31, 1990
    Date of Patent: May 11, 1993
    Assignee: Seiko Epson Corporation
    Inventors: Yasunori Nakazaki, Kazuki Hirakawa
  • Patent number: 4300224
    Abstract: An electronic timepiece comprising a fundamental frequency oscillator, a plurality of frequency divider stages, a timekeeping mechanism and display, includes circuitry for resetting and setting selective stages of the divider and thereby adding or subtracting timing pulses which are delivered to the timekeeping mechanism. A non-volatile memory stores data which terminates whether a divider stage is to be set or reset. Additionally, a plurality of circuit elements are selectively inserted to modify the circuit of the oscillator and to provide frequency adjustment. External contacts are provided for the inputting of data to memory and for measuring timing rate against an external standard.
    Type: Grant
    Filed: October 18, 1978
    Date of Patent: November 10, 1981
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventors: Yasunori Nakazaki, Tatsushi Asakawa
  • Patent number: 4242679
    Abstract: A liquid crystal display driving circuit arrangement that is formed entirely of elements that can be monolithically integrated in a circuit chip and that adjusts the effective voltage of the drive signals applied to the liquid crystal display cells in response to variations in external conditions is provided. A sensing circuit is adapted to produce a signal representative of a change in an external condition and in response thereto produce a sensing signal representative thereof. A pulse control circuit is adapted to detect the condition signal and in response thereto produce a control signal representative of a variation in effective voltage to be applied to the display cells. A driving circuit is coupled to a liquid crystal display for applying drive signals produced by display control circuit having a variable effective voltage.
    Type: Grant
    Filed: September 13, 1978
    Date of Patent: December 30, 1980
    Assignee: Kabushiki Kaisha Suwa Seikosha
    Inventors: Shinji Morozumi, Yoshio Yamazaki, Tatsushi Asakawa, Yasunori Nakazaki