Patents by Inventor Yasunori Yoshida

Yasunori Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8159267
    Abstract: To provide a semiconductor device which operates stably with few malfunctions due to noise, with low power consumption, and little variation in characteristics; a display device including the semiconductor device; and an electronic device including the display device. An output terminal is connected to a power supply line, thereby reducing variation in electric potential of the output terminal. In addition, a gate electrode potential which turns ON a transistor is maintained due to the capacitance of the transistor. Further, change in characteristics of the transistor is reduced by a signal line for reverse bias.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: April 17, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yasunori Yoshida
  • Publication number: 20120070738
    Abstract: A needle-like structure of silicon is provided. A crystalline silicon region is formed over a metal substrate by an LPCVD method, whereby whisker-like crystalline silicon which is a polycrystalline body and grows in the <110> direction or the <211> direction with {111} the plane as a twin boundary can be obtained. Whisker-like crystalline silicon grows while forming a twin crystal (introducing stacking faults), and an initial nucleus is provided so that the normal direction <111> of the twin boundary is always included in the plane perpendicular to the growth direction of whisker-like crystalline silicon (in a transverse cross section). Such a material is used as a negative electrode active material of a lithium-ion secondary battery and for a photoelectric conversion device such as a solar battery.
    Type: Application
    Filed: September 14, 2011
    Publication date: March 22, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Yasunori YOSHIDA
  • Publication number: 20120056550
    Abstract: The invention provides an active matrix EL display device which can perform a clear multi-gray scale color display. In particular, the invention provides a large active matrix EL display device at low cost by a manufacturing method which can selectively form a pattern. Power supply lines in a pixel portion are arranged in matrix by the manufacturing method which can selectively form a pattern. Further, capacitance between wirings is reduced by providing a longer distance between adjacent wirings by the manufacturing method which can selectively form a pattern.
    Type: Application
    Filed: November 10, 2011
    Publication date: March 8, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO.,LTD.
    Inventors: Yasunori YOSHIDA, Hajime Kimura, Shinji Maekawa, Osamu Nakamura, Shunpei Yamazaki
  • Publication number: 20120044447
    Abstract: With a display device using a pixel which includes a sub-pixel, the display device with improved viewing angle and quality of moving image display is provided without increase in power consumption by driving of the sub-pixel. A circuit which can change conducting states by a plurality of switches is provided, and charge in a plurality of sub-pixels and a capacitor element is transported mutually, so that desired voltage is applied to the plurality of sub-pixels without applying voltage in plural times from external. Moreover, a period in which each sub-pixel displays black is provided in accordance with transfer of charge.
    Type: Application
    Filed: November 1, 2011
    Publication date: February 23, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Yasunori Yoshida
  • Patent number: 8109296
    Abstract: A fluid flow passage structure and a manufacturing method therefor are provided, in which fluid flow passages can be easily produced employing a simple structure and process, while also being suitable for reducing the weight thereof. Wire members having a predetermined pattern are disposed between a first block member and a second block member. Airtight and fluidtight hermetic fluid flow passages are formed between such members, by forming the first block member, the second block member, and the wire members together as an integral structure.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: February 7, 2012
    Assignee: SMC Kabushiki Kaisha
    Inventors: Keiichi Minegishi, Yasunori Yoshida, Kouji Wada, Youichi Kawamura
  • Patent number: 8106865
    Abstract: It is an object of the present invention to provide a display device in which problems such as an increase of power consumption and increase of a load of when light is emitted are reduced by using a method for realizing pseudo impulsive driving by inserting an dark image, and a driving method thereof. A display device which displays a gray scale by dividing one frame period into a plurality of subframe periods, where one frame period is divided into at least a first subframe period and a second subframe period; and when luminance in the first subframe period to display the maximum gray scale is Lmax1 and luminance in the second subframe period to display the maximum gray scale is Lmax2, (½) Lmax2<Lmax1<( 9/10) Lmax2 is satisfied in the one frame period, is provided.
    Type: Grant
    Filed: May 4, 2007
    Date of Patent: January 31, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasunori Yoshida, Hajime Kimura
  • Patent number: 8102347
    Abstract: The invention provides an active matrix EL display device which can perform a clear multi-gray scale color display. In particular, the invention provides a large active matrix EL display device at low cost by a manufacturing method which can selectively form a pattern. Power supply lines in a pixel portion are arranged in matrix by the manufacturing method which can selectively form a pattern. Further, capacitance between wirings is reduced by providing a longer distance between adjacent wirings by the manufacturing method which can selectively form a pattern.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: January 24, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasunori Yoshida, Hajime Kimura, Shinji Maekawa, Osamu Nakamura, Shunpei Yamazaki
  • Publication number: 20120015247
    Abstract: It is difficult to obtain discharge capacity as high as the theoretical capacity in the case where silicon is used as a negative electrode active material. Therefore, objects are to provide a negative electrode active material capable of increasing discharge capacity and to provide a high-performance power storage device including the negative electrode active material. As the negative electrode active material with which the objects are achieved, a silicon crystal body including a plurality of crystalline regions is provided. The silicon crystal body has one extension direction. The plurality of crystalline regions have respective crystal orientations that are substantially the same (also referred to as a preferred orientation). The extension direction and the preferred direction are substantially the same.
    Type: Application
    Filed: July 8, 2011
    Publication date: January 19, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Yasunori YOSHIDA
  • Publication number: 20120003530
    Abstract: It is an object to improve performance of a power storage device, such as cycle characteristics. A power storage device includes a current collector and a crystalline semiconductor layer including a whisker, which is formed on and in close contact with the current collector. Separation of the crystalline semiconductor layer is suppressed by an increase of adhesion, whereby cycle characteristics in which a specific capacity of a tenth cycle number with respect to a first cycle number is greater than or equal to 90% is realized. In addition, cycle characteristics in which a specific capacity of a hundredth cycle number with respect to a first cycle number is greater than or equal to 70% is realized.
    Type: Application
    Filed: June 21, 2011
    Publication date: January 5, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kazutaka KURIKI, Michiko KONISHI, Asami TADOKORO, Yasunori YOSHIDA, Kiyofumi OGINO, Toshihiko TAKEUCHI
  • Patent number: 8059218
    Abstract: With a display device using a pixel which includes a sub-pixel, the display device with improved viewing angle and quality of moving image display is provided without increase in power consumption by driving of the sub-pixel. A circuit which can change conducting states by a plurality of switches is provided, and charge in a plurality of sub-pixels and a capacitor element is transported mutually, so that desired voltage is applied to the plurality of sub-pixels without applying voltage in plural times from external. Moreover, a period in which each sub-pixel displays black is provided in accordance with transfer of charge.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: November 15, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yasunori Yoshida
  • Publication number: 20110248981
    Abstract: To solve the lack of program time, which is a problem of a display device including an EL element, and to provide a display device including a pixel circuit with a high aperture ratio and a driving method thereof. In a circuit including a driving transistor, a capacitor, a display element which can be used as a capacitor, a first power supply line and a second power supply line, potentials of the first power supply line and the second power supply line are set to be almost the same, thereby a threshold voltage of the driving transistor is held in the display element, and after that, a charge is divided into the display element and the capacitor.
    Type: Application
    Filed: June 24, 2011
    Publication date: October 13, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Yasunori Yoshida
  • Patent number: 7969390
    Abstract: To solve the lack of program time, which is a problem of a display device including an EL element, and to provide a display device including a pixel circuit with a high aperture ratio and a driving method thereof. In a circuit including a driving transistor, a capacitor, a display element which can be used as a capacitor, a first power supply line and a second power supply line, potentials of the first power supply line and the second power supply line are set to be almost the same, thereby a threshold voltage of the driving transistor is held in the display element, and after that, a charge is divided into the display element and the capacitor.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: June 28, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yasunori Yoshida
  • Patent number: 7923124
    Abstract: A laminated structure is formed by stacking a first block member, an intermediate member, and a second block member together in this order, and then mutually joining each of the members. Further, by setting the elastic constant of the intermediate member to be greater than the elastic constants of the first block member and the second block member, deformation of grooves, which are formed in the first block member, is minimized.
    Type: Grant
    Filed: September 16, 2008
    Date of Patent: April 12, 2011
    Assignee: SMC Kabushiki Kaisha
    Inventors: Keiichi Minegishi, Yasunori Yoshida, Kouji Wada, Youichi Kawamura
  • Publication number: 20110080212
    Abstract: To provide a semiconductor device which operates stably with few malfunctions due to noise, with low power consumption, and little variation in characteristics; a display device including the semiconductor device; and an electronic device including the display device. An output terminal is connected to a power supply line, thereby reducing variation in electric potential of the output terminal. In addition, a gate electrode potential which turns ON a transistor is maintained due to the capacitance of the transistor. Further, change in characteristics of the transistor is reduced by a signal line for reverse bias.
    Type: Application
    Filed: December 6, 2010
    Publication date: April 7, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Yasunori Yoshida
  • Patent number: 7847593
    Abstract: To provide a semiconductor device which operates stably with few malfunctions due to noise, with low power consumption, and little variation in characteristics; a display device including the semiconductor device; and an electronic device including the display device. An output terminal is connected to a power supply line, thereby reducing variation in electric potential of the output terminal. In addition, a gate electrode potential which turns ON a transistor is maintained due to the capacitance of the transistor. Further, change in characteristics of the transistor is reduced by a signal line for reverse bias.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: December 7, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yasunori Yoshida
  • Publication number: 20100282347
    Abstract: A manifold comprises a base material section made from an amorphous resin, a solenoid valve section including a plurality of solenoid valves made up of valve bodies, and a coupling section including a plurality of pipe couplings. The overall surface of the base material section is covered in a surrounding fashion without pinholes by a protective film, which is a dense layer film made from a chemically stable material. The manifold is surrounded by a protective box as necessary.
    Type: Application
    Filed: April 15, 2010
    Publication date: November 11, 2010
    Applicant: SMC Kabushiki Kaisha
    Inventors: Katsumi IIJIMA, Kouji Wada, Yasunori Yoshida, Yutaka Yoshida
  • Patent number: 7825877
    Abstract: To provide a highly reliable display device whose electrical element is applied with a low voltage. The display device is an active matrix FED display device whose pixel has an individual extraction gate electrode, an emitter array, a driving transistor which is connected to the emitter array in series, a potential control circuit which controls the potential of the extraction gate electrode, and a circuit which includes a switching element and a voltage holding element. By varying the potential of the extraction gate electrode in accordance with Vgs of the driving transistor, the active matrix driving method is performed by connecting a driving transistor to the emitter array in series and voltage which is applied to the driving transistor can be reduced.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: November 2, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yasunori Yoshida
  • Publication number: 20100224934
    Abstract: The invention provides an active matrix EL display device which can perform a clear multi-gray scale color display. In particular, the invention provides a large active matrix EL display device at low cost by a manufacturing method which can selectively form a pattern. Power supply lines in a pixel portion are arranged in matrix by the manufacturing method which can selectively form a pattern. Further, capacitance between wirings is reduced by providing a longer distance between adjacent wirings by the manufacturing method which can selectively form a pattern.
    Type: Application
    Filed: May 20, 2010
    Publication date: September 9, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yasunori YOSHIDA, Hajime KIMURA, Shinji MAEKAWA, Osamu NAKAMURA, Shunpei YAMAZAKI
  • Patent number: 7733315
    Abstract: The invention provides an active matrix EL display device which can perform a clear multi-gray scale color display. In particular, the invention provides a large active matrix EL display device at low cost by a manufacturing method which can selectively form a pattern. Power supply lines in a pixel portion are arranged in matrix by the manufacturing method which can selectively form a pattern. Further, capacitance between wirings is reduced by providing a longer distance between adjacent wirings by the manufacturing method which can selectively form a pattern.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: June 8, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasunori Yoshida, Hajime Kimura, Shinji Maekawa, Osamu Nakamura, Shunpei Yamazaki
  • Patent number: 7710379
    Abstract: A display device and a driving method thereof are provided, which reduces an instantaneous current generated with a charge and discharge of source signal lines and further reduces a load to a power supply line. According to the invention, source signal lines are divided into the first to the n-th groups so as to be charged or discharged according to the first to the n-th latch pulses which are inputted at different timing. Since the number of the source signal lines which start to be charged or discharged at the same time is reduced, an instantaneous current generated with the charge and discharge can be reduced, and a load to the power supply line can be reduced as well.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: May 4, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd
    Inventors: Tomoyuki Iwabuchi, Yasunori Yoshida, Akihiro Kimura, Mizuki Sato