Patents by Inventor Yasuo Akatsuka

Yasuo Akatsuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10642562
    Abstract: A display apparatus includes a plurality of surfaces, and a display device provided on at least one surface among the plurality of surfaces. A plurality of communication sections are arranged to correspond to at least two or more side surfaces with respect to the surface on which the display device is provided among the plurality of surfaces and configured to perform communication within a predetermined distance, each of the plurality of communication sections including different identification information. A control section is configured to perform control of the plurality of communication sections and the display device. When another display apparatus is connected to the display apparatus, the control section periodically performs time synchronization to synchronize an image displayed on the display device with an image displayed on a display device provided in the other display apparatus.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: May 5, 2020
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuo Akatsuka, Masahiro Takagi, Hiroshi Tsurumi, Kojiro Suzuki, Koji Horisaki, Toshihiro Nakamura, Takashi Nakada
  • Publication number: 20190296579
    Abstract: According to an embodiment, a wireless power feeding device includes, in a block, coils for wireless power feeding disposed contiguous to at least two side surface sections. The wireless power feeding device includes a coil section for wireless power feeding including, as a set of pairs, respective coils for wireless power feeding and switches respectively connected in series to the coils for wires power feeding, at least two of the pairs being connected in parallel. The wireless power feeding device includes a power supply section connected to the coil section for wireless power feeding and for causing the wireless power feeding device to operate and a switching section for performing switching of the respective switches of the coil for wireless power feeding. A control section performs control for wireless power feeding.
    Type: Application
    Filed: September 4, 2018
    Publication date: September 26, 2019
    Inventors: Yasuo Akatsuka, Masahiro Takagi, Eiji Hori
  • Publication number: 20180357035
    Abstract: A display apparatus includes a plurality of surfaces, and a display device provided on at least one surface among the plurality of surfaces. A plurality of communication sections are arranged to correspond to at least two or more side surfaces with respect to the surface on which the display device is provided among the plurality of surfaces and configured to perform communication within a predetermined distance, each of the plurality of communication sections including different identification information. A control section is configured to perform control of the plurality of communication sections and the display device. When another display apparatus is connected to the display apparatus, the control section periodically performs time synchronization to synchronize an image displayed on the display device with an image displayed on a display device provided in the other display apparatus.
    Type: Application
    Filed: August 21, 2018
    Publication date: December 13, 2018
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuo AKATSUKA, Masahiro TAKAGI, Hiroshi TSURUMI, Kojiro SUZUKI, Koji HORISAKI, Toshihiro NAKAMURA, Takashi NAKADA
  • Patent number: 10078485
    Abstract: According to an embodiment, a display block is a display apparatus including a plurality of surfaces. The display block includes a display device, a plurality of transmitting/receiving sections that perform communication within a predetermined distance, and a control section. The display device is provided on at least one surface of the plurality of surfaces. The plurality of transmitting/receiving sections are arranged to correspond to at least two or more side surfaces with respect to the surface on which the display device is provided among the plurality of surfaces. The control section performs control of the plurality of transmitting/receiving sections and the display device.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: September 18, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuo Akatsuka, Masahiro Takagi, Hiroshi Tsurumi, Kojiro Suzuki, Koji Horisaki, Toshihiro Nakamura, Takashi Nakada
  • Publication number: 20180090658
    Abstract: According to one embodiment, a thermoelectric conversion device includes a first stacked body comprising a plurality of first semiconductor layers of a first conductivity type, the first semiconductor layers spaced from each other in a first direction, a second stacked body comprising a plurality of second semiconductor layers of a second conductivity type, the second semiconductor layers spaced from each other in the first direction, and a first connection portion electrically connecting the first stacked body to the second stacked body, wherein the first stacked body has a plurality of first openings that extend inwardly of the first stacked body in the first direction, wherein a direction from the first stacked body to the second stacked body intersects the first direction, and wherein the second stacked body has a plurality of second openings extending inwardly of the second stacked body in the first direction.
    Type: Application
    Filed: March 2, 2017
    Publication date: March 29, 2018
    Inventors: Yusuke KASAHARA, Miwa SATO, Yasuo AKATSUKA, Masamichi SUZUKI, Tomoaki INOKUCHI
  • Publication number: 20160266859
    Abstract: According to an embodiment, a display block is a display apparatus including a plurality of surfaces. The display block includes a display device, a plurality of transmitting/receiving sections that perform communication within a predetermined distance, and a control section. The display device is provided on at least one surface of the plurality of surfaces. The plurality of transmitting/receiving sections are arranged to correspond to at least two or more side surfaces with respect to the surface on which the display device is provided among the plurality of surfaces. The control section performs control of the plurality of transmitting/receiving sections and the display device.
    Type: Application
    Filed: March 4, 2016
    Publication date: September 15, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuo AKATSUKA, Masahiro TAKAGI, Hiroshi TSURUMI, Kojiro SUZUKI, Koji HORISAKI, Toshihiro NAKAMURA, Takashi NAKADA
  • Patent number: 4794567
    Abstract: A static memory circuit which can stably conduct a write operation with large margins is disclosed. The memory circuit comprises a plurality of static type memory cells, a first terminal for receiving input data to be written, a second terminal for receiving a control signal for changing an operation mode of the memory from a read operation mode to a write operation mode, a latch circuit for holding the input data during the write operation mode, and circuitry for applying the held data by the latch circuit to a selected memory cell.
    Type: Grant
    Filed: October 29, 1986
    Date of Patent: December 27, 1988
    Assignee: NEC Corporation
    Inventor: Yasuo Akatsuka
  • Patent number: 4723081
    Abstract: A CMOS integrated circuit formed in a first semiconductor substrate is supplied with a power through a power control circuit formed in a second semiconductor substrate. The power control circuit is, for example, a flip-flop using the CMOS integrated circuit as one load and detects that a resistance value of the one load is decreased below a predetermined value and decreases power supplied to the CMOS integrated circuit in response to the detection.
    Type: Grant
    Filed: September 11, 1985
    Date of Patent: February 2, 1988
    Assignee: NEC Corporation
    Inventor: Yasuo Akatsuka
  • Patent number: 4718043
    Abstract: An improved memory circuit having power-down mode is disclosed. The memory is of the type having a memory cell matrix and a peripheral circuit for achieving access operation to the memory cell matrix under control of at least one control signal and is featured in that a power supply to at least a part of the peripheral circuit is stopped only when the control signal is kept inactive for a predetermined period or more, reducing the power consumption in the memory.
    Type: Grant
    Filed: October 29, 1985
    Date of Patent: January 5, 1988
    Assignee: NEC Corporation
    Inventor: Yasuo Akatsuka
  • Patent number: 4338678
    Abstract: A memory device operable at high speed is disclosed. The device comprises selection means coupled to word lines for selecting one of them detection means for detecting a signal appearing in the selected word line, and word line drive means responsive to an output of the detection means for supplying the selected word line with a voltage capable introducing a selection level in it independent on the selection means.
    Type: Grant
    Filed: May 8, 1980
    Date of Patent: July 6, 1982
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Yasuo Akatsuka
  • Patent number: 4337525
    Abstract: An integrated circuit operable with low power consumption and high reliability is disclosed. The circuit comprises a logic circuit receiving an input logic signal at its input, detection means for detecting a change in the logic input signal, means responsive to an output of detection means for producing a control signal, and control means responsive to the control signal for setting the logic circuit at a predetermined condition irrespective of the input logic signal.
    Type: Grant
    Filed: April 11, 1980
    Date of Patent: June 29, 1982
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Yasuo Akatsuka