Patents by Inventor Yasuo Kaneda
Yasuo Kaneda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8546066Abstract: A method for forming a conductor pattern comprising the steps of (a) forming a photo-crosslinkable resin layer on a substrate provided with a conductive layer on its surface, (b) treating the photo-crosslinkable resin layer with an alkali aqueous solution to render it thinner, (c) carrying out exposure for a circuit pattern, (d) developing and (e) etching, the steps included in this order, said alkali aqueous solution being an aqueous solution containing 5 to 20 mass % of an inorganic alkaline compound, or method for forming a conductor pattern comprising the steps of (a?) forming a photo-crosslinkable resin layer on a substrate provide with a conductive layer on its surface and inside a hole thereof, (i) curing the photo-crosslinkable resin layer on the hole alone or on the hole and a surrounding area thereof, (b?) treating the photo-crosslinkable resin layer in an uncured portion with an alkali aqueous solution to render it thinner, (c) carrying out exposure for a circuit pattern, (d) developing and (e) etcType: GrantFiled: January 22, 2009Date of Patent: October 1, 2013Assignee: Mitsubishi Paper Mills LimitedInventors: Munetoshi Irisawa, Yuji Toyoda, Yasuo Kaneda, Kunihiro Nakagawa
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Patent number: 8143533Abstract: There are provided a method for forming a resist pattern for preparing a circuit board having a landless or small-land-width through-hole(s) to realize a high-density circuit board, a method for producing a circuit board, and a circuit board. A method for forming a resist pattern, comprising the steps of forming a resin layer and a mask layer on a first surface of a substrate having a through-hole(s), and removing the resin layer on the through-hole(s) and on a periphery of the through-hole(s) on the first surface by supplying a resin layer removing solution from a second surface opposite to the first surface of the substrate, and a method for producing a circuit board using the method for forming a resist pattern, and a circuit board.Type: GrantFiled: May 17, 2006Date of Patent: March 27, 2012Assignees: Mitsubishi Paper Mills Limited, Shinko Electric Industries Co., Ltd.Inventors: Yasuo Kaneda, Munetoshi Irisawa, Yuji Toyoda, Toyokazu Komuro, Katsuya Fukase, Toyoaki Sakai
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Publication number: 20110049104Abstract: An etchant for copper or copper alloy, which contains water as a main component and comprises (1) 1 to 20 mass % of iron (III) chloride and (2) 5 to 100 mass %, based on the iron chloride, of oxalic acid, and an etching method using the above etchant are provided, and the etching method includes pretreatment to be carried out with an aqueous solution containing at least one component selected from a component that dissolves copper or copper alloy and an acid, whereby well yields can be materialized.Type: ApplicationFiled: January 8, 2009Publication date: March 3, 2011Inventors: Makoto Kato, Yuji Toyoda, Kunihiro Nakagawa, Mariko Ishida, Yasuo Kaneda
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Publication number: 20100330504Abstract: A method for forming a conductor pattern comprising the steps of (a) forming a photo-crosslinkable resin layer on a substrate provided with a conductive layer on its surface, (b) treating the photo-crosslinkable resin layer with an alkali aqueous solution to render it thinner, (c) carrying out exposure for a circuit pattern, (d) developing and (e) etching, the steps included in this order, said alkali aqueous solution being an aqueous solution containing 5 to 20 mass % of an inorganic alkaline compound, or method for forming a conductor pattern comprising the steps of (a?) forming a photo-crosslinkable resin layer on a substrate provide with a conductive layer on its surface and inside a hole thereof, (i) curing the photo-crosslinkable resin layer on the hole alone or on the hole and a surrounding area thereof, (b?) treating the photo-crosslinkable resin layer in an uncured portion with an alkali aqueous solution to render it thinner, (c) carrying out exposure for a circuit pattern, (d) developing and (e) etcType: ApplicationFiled: January 22, 2009Publication date: December 30, 2010Inventors: Munetoshi Irisawa, Yuji Toyoda, Yasuo Kaneda, Kunihiro Nakagawa
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Patent number: 7679004Abstract: As means for solving a problem of a positional shift of a land and a hole which is caused by an alignment in the formation of an etching resist layer and a plated resist layer in a method of manufacturing a circuit board, there are provided a method of manufacturing a circuit board including the steps of forming a first resin layer on a surface of an insulating substrate having a conductive layer on the surface and an internal wall of a through hole or/and a non-through hole, forming a second resin layer which is insoluble or slightly soluble in a developing solution for the first resin layer on the first resin layer provided on the surface conductive layer, and removing the first resin layer provided over the hole with the developing solution for the first resin layer, and a method of manufacturing a circuit board including the step of uniformly charging a surface of the first resin layer to induce a potential difference to the first resin layer provided over the hole and the first resin layer provided on thType: GrantFiled: March 2, 2005Date of Patent: March 16, 2010Assignees: Shinko Electric Industries Co., Ltd., Mitsubishi Paper Mills LimitedInventors: Katsuya Fukase, Toyoaki Sakai, Munetoshi Irisawa, Toyokazu Komuro, Yasuo Kaneda, Masanori Natsuka, Wakana Aizawa
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Publication number: 20090236137Abstract: There are provided a method for forming a resist pattern for preparing a circuit board having a landless or small-land-width through-hole(s) to realize a high-density circuit board, a method for producing a circuit board, and a circuit board. A method for forming a resist pattern, comprising the steps of forming a resin layer and a mask layer on a first surface of a substrate having a through-hole(s), and removing the resin layer on the through-hole(s) and on a periphery of the through-hole(s) on the first surface by supplying a resin layer removing solution from a second surface opposite to the first surface of the substrate, and a method for producing a circuit board using the method for forming a resist pattern, and a circuit board.Type: ApplicationFiled: May 17, 2006Publication date: September 24, 2009Inventors: Yasuo Kaneda, Munetoshi Irisawa, Yuji Toyoda, Toyokazu Komuro, Katsuya Fukase, Toyoaki Sakai
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Publication number: 20090173245Abstract: The method for making a screen printing mask, provided by this invention is a method for making a resin-formed screen printing mask having a resin layer on one main surface of a screen printing mask having openings, a resin layer having openings nearly in the same locations as those of said openings of the screen printing mask, and comprises the step of coating the one main surface of said screen printing mask with the resin layer by laminating, and the step of removing those parts of said resin layer which are positioned nearly in the same locations as those of the openings of said screen printing mask by self-alignment, to form the openings through the resin layer.Type: ApplicationFiled: April 6, 2007Publication date: July 9, 2009Inventors: Munetoshi Irisawa, Yuji Toyoda, Yasuo Kaneda, Kunihiro Nakagawa
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Publication number: 20070181994Abstract: As means for solving a problem of a positional shift of a land and a hole which is caused by an alignment in the formation of an etching resist layer and a plated resist layer in a method of manufacturing a circuit board, there are provided a method of manufacturing a circuit board including the steps of forming a first resin layer on a surface of an insulating substrate having a conductive layer on the surface and an internal wall of a through hole or/and a non-through hole, forming a second resin layer which is insoluble or slightly soluble in a developing solution for the first resin layer on the first resin layer provided on the surface conductive layer, and removing the first resin layer provided over the hole with the developing solution for the first resin layer, and a method of manufacturing a circuit board including the step of uniformly charging a surface of the first resin layer to induce a potential difference to the first resin layer provided over the hole and the first resin layer provided on thType: ApplicationFiled: March 2, 2005Publication date: August 9, 2007Applicants: SHINKO ELECTRIC INDUSTRIES CO., LTD., MITSUBISHI PAPER MILLS LIMITEDInventors: Katsuya Fukase, Toyoaki Sakai, Munetoshi Irisawa, Toyokazu Komuro, Yasuo Kaneda, Masanori Natsuka, Wakana Aizawa
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Patent number: 6551753Abstract: There is disclosed a liquid developing method of a printed wiring board using a one-surface stepwise developing system which forms a resist pattern stepwisely according to an electrophotographic reverse developing method on each surface of a material to be developed obtained by forming photo-conductive layers on both surfaces of a both-surfaces copper-clad laminated board, wherein the method comprises the steps of subjecting to a static charging treatment on a surface to which no electrostatic latent image is formed which surface is positioned opposing to an electrostatic latent image-formed surface which is a surface to be exposed, or to a non-developing surface between completion of an exposure treatment and before a liquid toner developing treatment, and subjecting to the liquid toner developing treatment to form a toner image corresponding to the resist pattern on the electrostatically latent image-formed surface.Type: GrantFiled: April 14, 2000Date of Patent: April 22, 2003Assignee: Mitsubishi Paper Mills LimitedInventors: Masanori Natsuka, Yasuo Kaneda, Munetoshi Irisawa, Toyokazu Komuro, Noritaka Inoue, Kenji Hyodo
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Patent number: 6444379Abstract: There are provided a method for preparing a printed wiring board which can form electrostatic latent images at the desired positions of a substrate with good precision, and a uniform and good image can be formed for preparing a printed wiring board having circuits on the both surfaces of the substrate from a material to be developed having at least a metal conductive layer and a photoconductive layer on both surfaces of an insulating substrate in this order, and a preparation device.Type: GrantFiled: December 3, 1999Date of Patent: September 3, 2002Assignee: Mitsubishi Paper Mills LimitedInventors: Yasuo Kaneda, Masanori Takase, Kenji Hyodo