Patents by Inventor Yasuo Ohsone

Yasuo Ohsone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060157825
    Abstract: The invention is directed to improve resistance to destruction of a semiconductor device. A protection circuit having a plurality of bipolar transistors which are Darlington connected between outputs (collector and emitter) of an amplification circuit of a high output is electrically connected in parallel with the amplification circuit. The amplification circuit has a plurality of unit HBTs (Heterojunction Bipolar Transistors) which are connected in parallel with each other. The protection circuit has a two-stage configuration including a first group of a protection circuit having a plurality of bipolar transistors Q1 to Q5 and a second group of a protection circuit having a plurality of bipolar transistors.
    Type: Application
    Filed: March 16, 2006
    Publication date: July 20, 2006
    Inventors: Yasunari Umemoto, Hideyuki Ono, Tomonori Tanoue, Yasuo Ohsone, Isao Ohbu, Chushiro Kusano, Atsushi Kurokawa, Masao Yamane
  • Patent number: 7045877
    Abstract: The invention is directed to improve resistance to destruction of a semiconductor device. A protection circuit having a plurality of bipolar transistors which are Darlington connected between outputs (collector and emitter) of an amplification circuit of a high output is electrically connected in parallel with the amplification circuit. The amplification circuit has a plurality of unit HBTs (Heterojunction Bipolar Transistors) which are connected in parallel with each other. The protection circuit has a two-stage configuration including a first group of a protection circuit having a plurality of bipolar transistors Q1 to Q5 and a second group of a protection circuit having a plurality of bipolar transistors.
    Type: Grant
    Filed: April 23, 2003
    Date of Patent: May 16, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Yasunari Umemoto, Hideyuki Ono, Tomonori Tanoue, Yasuo Ohsone, Isao Ohbu, Chushiro Kusano, Atsushi Kurokawa, Masao Yamane
  • Publication number: 20040065900
    Abstract: The invention is directed to improve resistance to destruction of a semiconductor device. A protection circuit having a plurality of bipolar transistors which are Darlington connected between outputs (collector and emitter) of an amplification circuit of a high output is electrically connected in parallel with the amplification circuit. The amplification circuit has a plurality of unit HBTs (Heterojunction Bipolar Transistors) which are connected in parallel with each other. The protection circuit has a two-stage configuration including a first group of a protection circuit having a plurality of bipolar transistors Q1 to Q5 and a second group of a protection circuit having a plurality of bipolar transistors.
    Type: Application
    Filed: April 23, 2003
    Publication date: April 8, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Yasunari Umemoto, Hideyuki Ono, Tomonori Tanoue, Yasuo Ohsone, Isao Ohbu, Chushiro Kusano, Atsushi Kurokawa, Masao Yamane
  • Patent number: 5959351
    Abstract: There is disclosed a liquid-cooled electronic device. Semiconductor devices are mounted on a substrate of a semiconductor module immersed in a cooling liquid. A wire-like member is provided in the vicinity of a cooling medium ejection port of each cooling medium supply member which cools a respective one of the semiconductor devices by a jet of the cooling liquid. With this arrangement, the flow of the cooling liquid downstream of the wire-like member is disturbed to promote the boiling over the entire surface of the semiconductor device, and when the semiconductor device is to be cooled, a transient temperature rise is reduced at the time of starting the energization of the semiconductor device, thereby stabilizing the temperature of the semiconductor device.
    Type: Grant
    Filed: August 9, 1993
    Date of Patent: September 28, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Shigeyuki Sasaki, Tadakatsu Nakajima, Noriyuki Ashiwake, Yasuo Ohsone, Toshio Hatada, Toshiki Iino, Akio Idei, Kenichi Kasai
  • Patent number: 5406807
    Abstract: An apparatus for cooling semiconductor devices includes a module for cooling semiconductor devices; a refrigerant cooling device for receiving via an outlet pipe the refrigerant discharged through an outlet port of the module to cool the refrigerant; a refrigerant circulation pump for receiving, via a suction pipe, the refrigerant cooled by the refrigerant cooling device and sending the refrigerant to the module via an inlet pipe; and a refrigerant-flow stabilizing mechanism for stabilizing a refrigerant circulation flow discharged from the refrigerant circulation pump to be returned to the refrigerant circulation pump via the module and the refrigerant cooling device. Since the refrigerant-flow stabilizing mechanism stabilize the refrigerant flow, the refrigerant flow can be stably circulated so that the semiconductor devices in the module are stably cooled.
    Type: Grant
    Filed: June 16, 1993
    Date of Patent: April 18, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Noriyuki Ashiwake, Tadakatsu Nakajima, Shigeyuki Sasaki, Yasuo Ohsone, Toshio Hatada, Toshiki Iino, Kenichi Kasai, Akio Idei