Abstract: The invention enhances resistance to a surge in a semiconductor device having a semiconductor die mounted on a lead frame. An N type embedded layer, an epitaxial layer and a P type semiconductor layer are disposed on the front surface of a P type semiconductor substrate forming an IC die. A metal thin film is disposed on the back surface of the semiconductor substrate, and a conductive paste containing silver particles and so on is disposed between the metal thin film and a metal island. When a surge is applied to a pad electrode disposed on the front surface of the semiconductor layer, the surge current flowing from the semiconductor layer into the semiconductor substrate runs toward the metal island through the metal thin film.

Abstract: The invention enhances resistance to a surge in a semiconductor device having a semiconductor die mounted on a lead frame. An N type embedded layer, an epitaxial layer and a P type semiconductor layer are disposed on the front surface of a P type semiconductor substrate forming an IC die. A metal thin film is disposed on the back surface of the semiconductor substrate, and a conductive paste containing silver particles and so on is disposed between the metal thin film and a metal island. When a surge is applied to a pad electrode disposed on the front surface of the semiconductor layer, the surge current flowing from the semiconductor layer into the semiconductor substrate runs toward the metal island through the metal thin film.

Abstract: The invention is directed to providing an electrostatic breakdown protection circuit having an enhanced performance of protecting an internal circuit from a surge voltage such as static electricity (an operation speed or resistance to electrostatic breakdown). An N-channel type MOS transistor is connected between a wiring and a VSS (ground voltage) wiring. A first capacitor is connected between the wiring and a gate of the MOS transistor, and a second capacitor is connected between the VSS wiring and the gate. A voltage applied to an input/output terminal is divided by these capacitors, and the divided voltage is applied to the gate. When a surge voltage occurs, the MOS transistor is forced to turn on by the divided voltage to flow a current, thereby protecting an internal circuit. When a larger surge voltage occurs, a parasitic bipolar transistor turns on. A Zener diode is disposed between the gate and the VSS wiring in order to prevent a voltage applied to the gate from exceeding a predetermined voltage.

Abstract: A lower layer diffusion layer of a metal-insulator-semiconductor-type (MIS-type) condenser is formed by implanting and diffusing phosphorus into an upper portion of an epitaxial layer formed on a semiconductor substrate. Thereafter, a silicon nitride film functioning as a dielectric film of the MIS type condenser is formed on the lower layer diffusion layer, and a poly-silicon film functioning as a protective film for the silicon nitride film is formed on the silicon nitride film in succession to the formation of the silicon nitride film without performing any etching operation. The formation of the silicon nitride film and the poly-silicon film is performed according to a vacuum chemical vapor deposition in the same chamber to prevent the silicon nitride film from being exposed to oxygen. Thereafter, the silicon nitride film and the poly-silicon film are baked to form an oxidized film surrounding the silicon nitride film and the poly-silicon film.