Patents by Inventor Yasuo Sato

Yasuo Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9197064
    Abstract: In a power equipment control system connected, via a communication network, to a system operation server of a power system and a single or a plurality of power equipments for performing power consumption or storage with interconnecting to the power system, to regulate power demand and supply balance of the power equipment, a contribution degree is obtained by preparing a demand plan of subsequent power of said power equipment; transmitting, to said power equipment, information relevant to demand regulation request to said power equipment, received from said system operation server, based on said demand plan; receiving demand regulation result of observation information on the demand regulation performed within said power equipment, based on said demand regulation request; and performing said demand regulation by said power equipment from said demand regulation result.
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: November 24, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Yasuo Sato, Taichiro Kawahara, Masato Saito, Eisuke Kuroda
  • Publication number: 20150247898
    Abstract: The purpose of the invention is to provide a fault detection system etc., that reduces shift power in scan-out while maintaining the fault coverage. The fault detection system configured to detect a fault in a logic circuit by means of a scan test, includes: multiple flip-flops; a final signal generation unit that generates a final signal indicating a final capture in a capture mode; an assignment unit that differs from the logic circuit and the flip-flops, and that sets a logic signal for a part of the flip-flops upon receiving the final signal; and a fault detection device that detects a fault by making a comparison between a test output captured from the logic circuit and including the logic value set by the assignment unit and a test output to be obtained when the logic circuit has no fault and including the logic value set by the assignment unit.
    Type: Application
    Filed: May 14, 2013
    Publication date: September 3, 2015
    Applicant: Kyushu Institute of Technology
    Inventors: Yasuo Sato, Senling Wang, Kohei Miyase, Seiji Kajihara
  • Publication number: 20150214741
    Abstract: A device in a power system is controlled so that the power system becomes close to a desired system state. Provided is a system control device including a storage unit which stores target information representing a target voltage phase of a specific site in a power system and measurement information representing a voltage phase of a measurement result of the specific site, and a control unit which controls a target device associated with the power system based on a difference between the measurement information and the target information.
    Type: Application
    Filed: June 24, 2013
    Publication date: July 30, 2015
    Inventors: Eisuke Kuroda, Yasuo Sato, Taichiro Kawahara, Koichi Hara
  • Publication number: 20150196871
    Abstract: The present invention is to provide a means for easily replacing palladium alloy capillaries in a hydrogen purification device formed by using hydrogen separation membrane formed from the palladium alloy capillaries. The hydrogen purification device can be easily disassembled into a palladium alloy membrane unit and a storage structure thereof. A palladium alloy membrane unit is provided with a plurality of palladium alloy capillaries, a disk-shaped tube sheet supporting the palladium alloy capillaries, a pure hydrogen discharge pipe having a cylinder being in close contact with a periphery of the tube sheet at one end, a joint connecting with a pure hydrogen outlet of the storage structure at the other end, and preferably a joint being in close contact with an opening of a container of the storage structure at a position between the cylinder and the outlet joint.
    Type: Application
    Filed: December 23, 2014
    Publication date: July 16, 2015
    Inventors: Yoshinao KOMIYA, Satoshi ARAKAWA, Toshio AKIYAMA, Yasuo SATO, Noboru TAKEMASA
  • Patent number: 9075110
    Abstract: It is a purpose of the invention to provide a fault detection system, etc., having improved fault coverage with a reduced number of test patterns to be input to a logic circuit. The fault detection system detects a fault in a logic circuit based on multiple output logic values of the logic circuit after a test input pattern is input. The output logic values are input to the logic circuit as an updated test input pattern. The system comprises: a first acquisition unit which acquires a part of or all of the output logic values; a comparison unit which compares the logic values acquired by the first acquisition unit with those predicted for when there are no faults, or for when there is a specific fault; and a fault judgment unit which judges whether or not there is a fault based on the comparison result obtained by the comparison unit.
    Type: Grant
    Filed: September 28, 2011
    Date of Patent: July 7, 2015
    Assignee: KYUSHU INSTITUTE OF TECHNOLOGY
    Inventors: Yasuo Sato, Seiji Kajihara
  • Patent number: 9001480
    Abstract: A distributed energy resources control apparatus for controlling power from a distributed energy resource in a system section separable from a power system includes a detecting unit, a receiving unit, and a control unit. The detecting unit detects a fault of the power system. The receiving unit receives a signal indicating authorization for the distributed energy resource to perform independent operation as linking with the system section, when the system section is separated from the power system. The control unit controls a power converter converting power from the distributed energy resource and outputting to the system section, based on measurement results of a voltage and a frequency of the system section, when the fault is detected and the signal is received.
    Type: Grant
    Filed: February 19, 2013
    Date of Patent: April 7, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Yasuo Sato, Takafumi Ebara, Masahiro Watanabe, Tsukasa Onishi
  • Publication number: 20150084432
    Abstract: A power system management device which manages a system state in a power system includes a system state candidate calculation unit for calculating state amounts of the system state based on an objective function from system characteristic information indicating characteristic information of a system structure, an inter-state distance calculation unit for calculating an inter-state distance representing a similarity of values between state amounts of the system state calculated by the system state candidate calculation unit, and a variability evaluation value calculation unit for calculating a variability evaluation value in which a variability of the system state is evaluated, based on an objective function value calculated from the state amount of the system state calculated by the system state candidate calculation unit and the inter-state distance calculated by the inter-state distance calculation unit. The system state is selected based on the calculated variability evaluation value.
    Type: Application
    Filed: August 18, 2014
    Publication date: March 26, 2015
    Inventors: Jun YAMAZAKI, Yasuo SATO, Toshiyuki SAWA, Taichiro KAWAHARA
  • Patent number: 8959001
    Abstract: A test pattern is sequentially selected from an original test pattern sequence constituted by a plurality of test patterns including a don't care bit. Power consumption in each of regions obtained by substantially equally dividing a layout region of a semiconductor integrated circuit in a case where a don't care value is specified in the selected test pattern and this selected test pattern is applied to the semiconductor integrated circuit is estimated. A searching is conducted for a don't care value of the selected test pattern which minimizes a variation in power consumption among the regions by repeatedly changing the don't care value and repeatedly estimating power consumption in the regions. A new test pattern sequence constituted by a plurality of test patterns including no don't care bit is generated by defining the don't care value obtained by the searching as a don't care value of the selected test pattern.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: February 17, 2015
    Assignees: National University Corporation Nara Institute of Science and Technology, Kyushu Institute of Technology
    Inventors: Michiko Inoue, Tomokazu Yoneda, Yasuo Sato
  • Publication number: 20150006102
    Abstract: A test pattern generation device for generating a new test pattern keeping the feature of original test patterns. The test pattern generation device includes a logic value generation unit for generating a new logic value by referring given logic values of a first bit, a second bit and a third bit and by keeping or reversing a logic value of the second bit, wherein a logic value of the first bit is the same with a logic value of a given initial test pattern or a new test pattern generated by the test pattern generation device based on the initial test pattern, wherein a logic value of the second bit is the same with a logic value of the initial test pattern, and wherein a logic value of the third bit is the same with a logic value of the initial test pattern or the new test pattern.
    Type: Application
    Filed: January 9, 2013
    Publication date: January 1, 2015
    Inventors: Yasuo Sato, Seiji Kajihara
  • Publication number: 20150006080
    Abstract: The power generation amount of a PV device is estimated by multiple light receiving devices, which are dispersed in a predetermined area and each of which outputs a receive light signal corresponding to the amount of received light, and by an estimation device connected to the multiple light receiving devices through a communication network. The estimation device predicts the cloud shadow projected on the ground based on the received light signal obtained multiple times from a predetermined number of light receiving devices of the multiple light receiving devices. Then, the estimation device estimates the amount of power generated by the PV device installed in the predetermined area, based on the predicted cloud shadow.
    Type: Application
    Filed: February 7, 2013
    Publication date: January 1, 2015
    Inventors: Jun Yamazaki, Yasuo Sato
  • Patent number: 8768527
    Abstract: A power demand/supply management server (10) obtains information defining restraint contents to a comfort and an electricity bill from a consumer power operating device (2). An individual-consumer control optimizing unit of the power demand/supply management server (10) calculates control contents to an electrical equipment having a minimum cost evaluation value based on a simulation result of cost evaluation values which are barometers for evaluating a comfort and an electricity bill excessiveness, and transmits the calculated control contents to the consumer power operating device (2). Also, a whole-consumer optimizing unit of the power demand/supply management server (10) calculates the most appropriate electricity unit meter-charge that ensures a necessary demand suppression plan level throughout the whole power system based on an electricity daily load curve for each consumer.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: July 1, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Yasushi Tomita, Yasuo Sato, Masahiro Watanabe, Rena Tachihara, Yuichi Otake, Tatsuya Yamada
  • Publication number: 20130265030
    Abstract: A command system of a power conditioning system of the present invention receives return pattern information including a time instance and an upper output limit, and issues a command with respect to the upper output limit of the power conditioning system, the return pattern information being for preventing the frequency of an isolated power system, which is calculated by a planning server, from causing a sharp change.
    Type: Application
    Filed: December 1, 2011
    Publication date: October 10, 2013
    Applicant: Hitachi, Ltd.
    Inventors: Eisuke Kuroda, Yasuo Sato, Masahiro Watanabe, Taichiro Kawahara
  • Publication number: 20130258730
    Abstract: A distributed energy resources control apparatus for controlling power from a distributed energy resource in a system section separable from a power system includes a detecting unit, a receiving unit, and a control unit. The detecting unit detects a fault of the power system. The receiving unit receives a signal indicating authorization for the distributed energy resource to perform independent operation as linking with the system section, when the system section is separated from the power system. The control unit controls a power converter converting power from the distributed energy resource and outputting to the system section, based on measurement results of a voltage and a frequency of the system section, when the fault is detected and the signal is received.
    Type: Application
    Filed: February 19, 2013
    Publication date: October 3, 2013
    Applicant: HITACHI, LTD.
    Inventors: Yasuo SATO, Takafumi EBARA, Masahiro WATANABE, Tsukasa ONISHI
  • Publication number: 20130205180
    Abstract: It is a purpose of the invention to provide a fault detection system, etc., having improved fault coverage with a reduced number of test patterns to be input to a logic circuit. The fault detection system detects a fault in a logic circuit based on multiple output logic values of the logic circuit after a test input pattern is input. The output logic values are input to the logic circuit as an updated test input pattern. The system comprises: a first acquisition unit which acquires a part of or all of the output logic values; a comparison unit which compares the logic values acquired by the first acquisition unit with those predicted for when there are no faults, or for when there is a specific fault; and a fault judgment unit which judges whether or not there is a fault based on the comparison result obtained by the comparison unit.
    Type: Application
    Filed: September 28, 2011
    Publication date: August 8, 2013
    Applicant: KYUSHU INSTITUTE OF TECHNOLOGY
    Inventors: Yasuo Sato, Seiji Kajihara
  • Publication number: 20130069447
    Abstract: If a failure has occurred on the backbone-power-transmission-network side, i.e., the electric-power system, and if the power supply to a power-distributing/transforming substation is stopped, a power-distributing feeder is cut off from the electric-power system. Moreover, a monitor/control apparatus transmits a single-operation-permitting permission signal to a distributed power-source system which is connected to the cut-off power-distributing feeder. Here, the distributed power-source system supplies its power to the power-distributing feeder only during a time-interval in which the system is receiving the permission signal. A general load and an important load, which are connected to the power-distributing feeder, find it possible to continue their activities by taking advantage of this power.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 21, 2013
    Applicant: HITACHI, LTD.
    Inventors: Yasuo SATO, Takafumi EBARA, Masahiro WATANABE
  • Patent number: 8392776
    Abstract: An extraction unit of fault assumption and a finish-point FF is provided, the fault assumption is selected from fault assumption information, and a logic trace is executed from the fault assumption toward an output side. A test result of a finish-point FF obtained as a result of the trace from the fault assumption is determined. The maximum value and the minimum value of the propagation route up to the finish-point FF are determined, and a delay margin is determined from the values. A delay range is determined by using the delay margin and the test result, and a fault candidate and a delay range of the delay fault are specified by the process of the determination of the fault candidate and the delay range.
    Type: Grant
    Filed: April 15, 2010
    Date of Patent: March 5, 2013
    Assignee: Hitachi, Ltd.
    Inventors: Daisuke Ito, Hiroki Yamanaka, Yasuo Sato
  • Publication number: 20130013247
    Abstract: A semiconductor device and the like that can determine the performance of a semiconductor integrated circuit with higher accuracy even when test environment fluctuates. The semiconductor device detects degradation of the semiconductor integrated circuit, including measurement unit that measures temperature and voltage, decision unit that judges whether the test is executed within an allowable test timing in the detection target circuit portion at each test operation frequency and decides a maximum test operation frequency and calculation unit that converts a maximum test operation frequency into that at a standard temperature and voltage and calculates a degradation amount. The semiconductor integrated circuit has a monitor block circuit that monitors the values for the measurement unit to measure temperature and voltage. The measurement unit has estimation unit that estimates temperature and voltage of a detection target circuit portion based on the monitored values.
    Type: Application
    Filed: March 14, 2011
    Publication date: January 10, 2013
    Applicants: KYUSHU INSTITUTE OF TECHNOLOGY, TOKYO METROPOLITAN UNIVERSITY, NATIONAL UNIVERSITY CORPORATION NARA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Yasuo Sato, Seiji Kajihara, Michiko Inoue, Tomokazu Yoneda, Hyunbean Yi, Yukiya Miura
  • Publication number: 20120323395
    Abstract: In a power equipment control system connected, via a communication network, to a system operation server of a power system and a single or a plurality of power equipments for performing power consumption or storage with interconnecting to the power system, to regulate power demand and supply balance of the power equipment, a contribution degree is obtained by preparing a demand plan of subsequent power of said power equipment; transmitting, to said power equipment, information relevant to demand regulation request to said power equipment, received from said system operation server, based on said demand plan; receiving demand regulation result of observation information on the demand regulation performed within said power equipment, based on said demand regulation request; and performing said demand regulation by said power equipment from said demand regulation result.
    Type: Application
    Filed: June 14, 2012
    Publication date: December 20, 2012
    Applicant: Hitachi, Ltd.
    Inventors: Yasuo SATO, Taichiro Kawahara, Masato Saito, Eisuke Kuroda
  • Patent number: 8330415
    Abstract: A charge/discharge control apparatus includes: a charge/discharge reward information receiving unit for receiving charge/discharge reward information representing a reward given to a charge/discharge action of a customer and a restriction in conducting a charging/discharging from a charge management central server; a computing unit for creating a charge/discharge plan including a total charging quantity in a time zone and an estimated use start time of an electric vehicle such that a reward is maximized, based on the charge/discharge reward information; a charge/discharge instruction transmitting unit for instructing the electric vehicle to start or finish a charging/discharging according to the charge/discharge plan; a charge/discharge quantity monitoring unit for monitoring the charging/discharging; and a charge/discharge results transmitting unit for transmitting results of monitored charging/discharging including contents of the conducted charging/discharging and individual identification information for
    Type: Grant
    Filed: August 14, 2009
    Date of Patent: December 11, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Yasuo Sato, Takao Matsuzaki, Masahiro Watanabe, Yasushi Tomita
  • Publication number: 20120283981
    Abstract: A test pattern is sequentially selected from an original test pattern sequence constituted by a plurality of test patterns including a don't care bit. Power consumption in each of regions obtained by substantially equally dividing a layout region of a semiconductor integrated circuit in a case where a don't care value is specified in the selected test pattern and this selected test pattern is applied to the semiconductor integrated circuit is estimated. A searching is conducted for a don't care value of the selected test pattern which minimizes a variation in power consumption among the regions by repeatedly changing the don't care value and repeatedly estimating power consumption in the regions. A new test pattern sequence constituted by a plurality of test patterns including no don't care bit is generated by defining the don't care value obtained by the searching as a don't care value of the selected test pattern.
    Type: Application
    Filed: July 16, 2012
    Publication date: November 8, 2012
    Applicants: KYUSHU INSTITUTE OF TECHNOLOGY, National University Corp. Nara Institute Of Science And Technology
    Inventors: Michiko INOUE, Tomokazu YONEDA, Yasuo SATO