Patents by Inventor Yasushi Hiroshima
Yasushi Hiroshima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11443877Abstract: A strain sensor resistor includes: a resistive element (thin-film strain-resistive layer) formed nearly at the center of an upper surface of an insulation substrate to be a base; and front surface electrodes layered and formed on either end part of the resistive element and electrically connected to the resistive element. The entire upper part of the resistive element and a part of the front surface electrodes are covered by a protective film (protective coating). Moreover, back surface electrodes electrically connected to the front surface electrodes are formed on either lower end part of the insulation substrate, and end surface electrodes are formed on either longitudinal end surface of the insulation substrate. The strain sensor resistor has a tip shape solder mountable on a circuit board etc. using the back surface electrodes.Type: GrantFiled: September 17, 2019Date of Patent: September 13, 2022Assignee: KOA CorporationInventors: Homare Kaneko, Natsumi Shiobara, Yasushi Hiroshima
-
Publication number: 20210335524Abstract: A strain sensor resistor includes: a resistive element (thin-film strain-resistive layer) formed nearly at the center of an upper surface of an insulation substrate to be a base; and front surface electrodes layered and formed on either end part of the resistive element and electrically connected to the resistive element. The entire upper part of the resistive element and a part of the front surface electrodes are covered by a protective film (protective coating). Moreover, back surface electrodes electrically connected to the front surface electrodes are formed on either lower end part of the insulation substrate, and end surface electrodes are formed on either longitudinal end surface of the insulation substrate. The strain sensor resistor has a tip shape solder mountable on a circuit board etc. using the back surface electrodes.Type: ApplicationFiled: September 17, 2019Publication date: October 28, 2021Inventors: Homare KANEKO, Natsumi SHIOBARA, Yasushi HIROSHIMA
-
Patent number: 10446295Abstract: Provided is a thin-film chip resistor including an insulating substrate; a thin-film resistive element formed on the substrate; a pair of electrodes connected to the thin-film resistive element; and a protective film covering at least the thin-film resistive element between the pair of electrodes, in which the protective film includes a first protective film and a second protective film, the first protective film containing silicon nitride in contact with the thin-film resistive element, and the second protective film containing silicon oxide in contact with the first protective film.Type: GrantFiled: January 23, 2017Date of Patent: October 15, 2019Assignee: KOA CORPORATIONInventor: Yasushi Hiroshima
-
Publication number: 20190035520Abstract: Provided is a thin-film chip resistor including an insulating substrate; a thin-film resistive element formed on the substrate; a pair of electrodes connected to the thin-film resistive element; and a protective film covering at least the thin-film resistive element between the pair of electrodes, in which the protective film includes a first protective film and a second protective film, the first protective film containing silicon nitride in contact with the thin-film resistive element, and the second protective film containing silicon oxide in contact with the first protective film.Type: ApplicationFiled: January 23, 2017Publication date: January 31, 2019Inventor: Yasushi HIROSHIMA
-
Patent number: 10115504Abstract: Provided is a thin-film resistor that has a higher resistance value than the conventional thin-film resistors while retaining excellent TCR characteristics. The thin-film resistor includes a substrate, a pair of electrodes formed on the substrate, and a resistive film connected to the pair of electrodes. The resistive film includes a first resistive film and a second resistive film, the second resistive film having a different TCR from that of the first resistive film, and each of the first resistive film and the second resistive film contains Si, Cr, and N as the main components.Type: GrantFiled: July 1, 2016Date of Patent: October 30, 2018Assignee: KOA CORPORATIONInventor: Yasushi Hiroshima
-
Publication number: 20170011826Abstract: Provided is a thin-film resistor that has a higher resistance value than the conventional thin-film resistors while retaining excellent TCR characteristics. The thin-film resistor includes a substrate, a pair of electrodes formed on the substrate, and a resistive film connected to the pair of electrodes. The resistive film includes a first resistive film and a second resistive film, the second resistive film having a different TCR from that of the first resistive film, and each of the first resistive film and the second resistive film contains Si, Cr, and N as the main components.Type: ApplicationFiled: July 1, 2016Publication date: January 12, 2017Inventor: Yasushi HIROSHIMA
-
Patent number: 8773347Abstract: An electro-optical device includes an element substrate having a temperature detection conductive film formed by doping with an impurity in the same semiconductor layer as a semiconductor layer of transistor; and a driving portion for supplying a driving signal, wherein the driving portion includes a data conversion portion for converting image data and generating, as the driving signal, a digital driving signal made of an ON-voltage in which the brightness of the pixel is saturated and an OFF-voltage in which the pixel becomes a light-off state in each of a plurality of subfields in which a field period is divided on a time axis, and the data conversion portion performs a correction corresponding to a change in resistance in the temperature detection conductive film when generating the digital driving signal.Type: GrantFiled: December 10, 2010Date of Patent: July 8, 2014Assignee: Seiko Epson CorporationInventor: Yasushi Hiroshima
-
Patent number: 8300295Abstract: A thin film semiconductor device includes, on a substrate, a thin film transistor of which channel is N-type, and a thin film transistor of which channel is P-type, wherein a source region of the N-type thin film transistor and a source region of the P-type thin film transistor are arranged so as to be adjacent to each other at least in some region and are electrically connected to a first electrode through one contact hole formed on the some region, and a drain region of the N-type thin film transistor and a drain region of the P-type thin film transistor are arranged so as to be adjacent to each other at least in some region and are electrically connected to a second electrode through one contact hole formed on the some region.Type: GrantFiled: March 12, 2010Date of Patent: October 30, 2012Assignee: Seiko Epson CorporationInventor: Yasushi Hiroshima
-
Patent number: 8130335Abstract: Stray light in an oblique direction penetrates a channel part of a thin-film transistor, which sometimes causes light leakage current. This phenomenon becomes more pronounced in the case of using an optical system with high intensity, leading to deterioration in an image quality. To prevent the light that possibly penetrates an equivalent optical waveguide from reaching the channel part, on the condition that a first insulating layer is set to have a layer-thickness t (nm) and a refraction index n, a relation is to be expressed by the following expression. t<(0.61×?)/(n×sin ?) A value of ? is set to a lower limit 400 (nm) of a visible light wavelength and a value Lc (nm) is set to a distance between an end of a light-shielding layer and an end of a channel region. With those values, an expression of nt2/244 (nm)<Lc (nm) is set up.Type: GrantFiled: February 5, 2008Date of Patent: March 6, 2012Assignee: Seiko Epson CorporationInventor: Yasushi Hiroshima
-
Patent number: 8110832Abstract: An electro-optical substrate, including: a transparent substrate; a first light-shielding layer arranged on a first surface of the transparent substrate, in at least part of a region surrounding an opening in plan view; a first insulating layer arranged in a position facing the transparent substrate with the first light-shielding layer interposed therebetween, the first insulating layer having a refraction index n and a layer thickness t measured in nanometers, and covering at least part of the first light-shielding layer; a semiconductor layer, arranged in a position facing the transparent substrate, with the first light-shielding layer interposed therebetween, containing part of a thin film transistor, the thin film transistor including a channel region which is, in plan view, positioned within the first light-shielding layer, a corner edge of the first light-shielding layer and a corner edge of the channel region having a distance Lc therebetween in nanometers, the distance Lc satisfying relational expressType: GrantFiled: February 21, 2008Date of Patent: February 7, 2012Assignee: Seiko Epson CorporationInventor: Yasushi Hiroshima
-
Publication number: 20110141157Abstract: An electro-optical device includes an element substrate having a temperature detection conductive film formed by doping with an impurity in the same semiconductor layer as a semiconductor layer of transistor; and a driving portion for supplying a driving signal, wherein the driving portion includes a data conversion portion for converting image data and generating, as the driving signal, a digital driving signal made of an ON-voltage in which the brightness of the pixel is saturated and an OFF-voltage in which the pixel becomes a light-off state in each of a plurality of subfields in which a field period is divided on a time axis, and the data conversion portion performs a correction corresponding to a change in resistance in the temperature detection conductive film when generating the digital driving signal.Type: ApplicationFiled: December 10, 2010Publication date: June 16, 2011Applicant: Seiko Epson CorporaitonInventor: Yasushi Hiroshima
-
Publication number: 20100232004Abstract: A thin film semiconductor device includes, on a substrate, a thin film transistor of which channel is N-type, and a thin film transistor of which channel is P-type, wherein a source region of the N-type thin film transistor and a source region of the P-type thin film transistor are arranged so as to be adjacent to each other at least in some region and are electrically connected to a first electrode through one contact hole formed on the some region, and a drain region of the N-type thin film transistor and a drain region of the P-type thin film transistor are arranged so as to be adjacent to each other at least in some region and are electrically connected to a second electrode through one contact hole formed on the some region.Type: ApplicationFiled: March 12, 2010Publication date: September 16, 2010Applicant: SEIKO EPSON CORPORATIONInventor: Yasushi HIROSHIMA
-
Publication number: 20080203396Abstract: An electro-optical substrate, including: a transparent substrate; a first light-shielding layer arranged on a first surface of the transparent substrate, in at least part of a region surrounding an opening in plan view; a first insulating layer arranged in a position facing the transparent substrate with the first light-shielding layer interposed therebetween, the first insulating layer having a refraction index n and a layer thickness t measured in nanometers, and covering at least part of the first light-shielding layer; a semiconductor layer, arranged in a position facing the transparent substrate, with the first light-shielding layer interposed therebetween, containing part of a thin film transistor, the thin film transistor including a channel region which is, in plan view, positioned within the first light-shielding layer, a corner edge of the first light-shielding layer and a corner edge of the channel region having a distance Lc therebetween in nanometers, the distance Lc satisfying relational expressType: ApplicationFiled: February 21, 2008Publication date: August 28, 2008Applicant: SEIKO EPSON CORPORATIONInventor: Yasushi Hiroshima
-
Publication number: 20080191210Abstract: Stray light in an oblique direction penetrates a channel part of a thin-film transistor, which sometimes causes light leakage current. This phenomenon becomes more pronounced in the case of using an optical system with high intensity, leading to deterioration in an image quality. To prevent the light that possibly penetrates an equivalent optical waveguide from reaching the channel part, on the condition that a first insulating layer is set to have a layer-thickness t (nm) and a refraction index n, a relation is to be expressed by the following expression. t<(0.61×?)/(n×sin ?) A value of ? is set to a lower limit 400 (nm) of a visible light wavelength and a value Lc (nm) is set to a distance between an end of a light-shielding layer and an end of a channel region. With those values, an expression of nt2/244 (nm)<Lc (nm) is set up.Type: ApplicationFiled: February 5, 2008Publication date: August 14, 2008Applicant: SEIKO EPSON CORPORATIONInventor: Yasushi HIROSHIMA
-
Publication number: 20080029819Abstract: A semiconductor device includes a transistor with a semiconductor film formed above a substrate that has at least one insulating surface; a source electrode coupled to a source region of the transistor; and a drain electrode coupled to a drain region of the transistor. The source region and the drain region of the transistor are formed of a plurality of substantially single-crystal grains contained in the semiconductor film. Each of the plurality of substantially single-crystal grains is formed corresponding to one of a plurality of recesses formed in the substrate. Electrical coupling between the drain region and the drain electrode or electrical coupling between the source region and the source electrode is made by using a conductive material disposed in a contact hole. The area of one of the plurality of substantially single-crystal grains is smaller than the sectional area of the contact hole.Type: ApplicationFiled: July 25, 2007Publication date: February 7, 2008Applicant: SEIKO EPSON CORPORATIONInventor: Yasushi HIROSHIMA
-
Patent number: 7179694Abstract: A method of manufacturing a semiconductor device includes an origin part forming process in order to form a plurality of origin parts, each of which serves as an origin for crystallization of a semiconductor film on a substrate, a semiconductor film forming process to form the semiconductor film on the substrate where the origin parts have been formed, and a thermal treatment process in which the semiconductor film is thermally treated in order to form a plurality of nearly single crystalline grains, each of which is almost centered at each of the plurality of origin parts.Type: GrantFiled: April 1, 2005Date of Patent: February 20, 2007Assignee: Seiko Epson CorporationInventor: Yasushi Hiroshima
-
Patent number: 7148095Abstract: A method of manufacturing a semiconductor is provided. The method includes the steps of forming a priming insulation film on a substrate, forming a first insulation film on the priming insulation film, forming an opening with a diameter of d1 in the first insulation film, and forming a second insulation film on the first insulation film including the opening The film thickness distribution of the second insulation film in the step of forming the second insulation film is ±y %, wherein the diameter d1 of the opening satisfies the following relationship: d1?6500/y+85 nm.Type: GrantFiled: April 1, 2005Date of Patent: December 12, 2006Assignee: Seiko Epson CorporationInventor: Yasushi Hiroshima
-
Patent number: 7078275Abstract: An object is to provide a semiconductor device manufacturing method which makes possible a thin film transistor which is little affected by crystal grain boundaries, even when the channel width of the thin film transistor is made larger than the crystal grains of the semiconductor material. To this end, a thin film transistor of this invention comprises a gate electrode 22, source region 24, drain region 25, and channel formation region 26. The silicon film used in forming the active region comprises a plurality of substantially single-crystal silicon crystal grains, and regions including crystal grain boundaries which exist in the longitudinal direction of the channel formation region 26 (the direction L in the drawings) are removed. By this means, crystal grain boundaries are prevented from being included in each channel formation region 26, and the effective channel width can be increased.Type: GrantFiled: April 11, 2003Date of Patent: July 18, 2006Assignee: Seiko Epson CorporationInventors: Yasushi Hiroshima, Mitsutoshi Miyasaka
-
Publication number: 20050266620Abstract: The present invention is directed to a semiconductor device with a thin film transistor on a substrate and a method of forming that semiconductor device and thin film transistor on a substrate. The thin film transistor on the substrate is created by forming a starting point section to be an origin of crystallization of a semiconductor film on the substrate. The semiconductor film is then formed on the substrate originally provided with the starting point. Heat treatment is executed on the semiconductor film to form a substantially single crystal grain having a substantially centered starting point. The semiconductor film is patterned to form a transistor region and a thin film transistor is formed with by forming a gate insulation layer and the gate electrode on the transistor region. The thickness of the semiconductor film of the thin film transistor is less than or equal to 1/7 of the channel length.Type: ApplicationFiled: May 25, 2005Publication date: December 1, 2005Applicant: Seiko Epson CorporationInventor: Yasushi Hiroshima
-
Publication number: 20050233510Abstract: A method of manufacturing a semiconductor device includes an origin part forming process in order to form a plurality of origin parts, each of which serves as an origin for crystallization of a semiconductor film on a substrate, a semiconductor film forming process to form the semiconductor film on the substrate where the origin parts have been formed, and a thermal treatment process in which the semiconductor film is thermally treated in order to form a plurality of nearly single crystalline grains, each of which is almost centered at each of the plurality of origin parts.Type: ApplicationFiled: April 1, 2005Publication date: October 20, 2005Applicant: Seiko Epson CorporationInventor: Yasushi Hiroshima