Patents by Inventor Yasushi Nakayama
Yasushi Nakayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11985650Abstract: A wireless LAN system in which a BSS composed of one wireless LAN base station and a plurality of wireless LAN terminals belonging to the wireless LAN base station, is set as a unit, and a plurality of the BSSs using an identical channel respectively perform uplink multi-user transmission, includes a radio control apparatus that is connected to the wireless LAN base station of each of the plurality of the BSSs and a wireless LAN terminal of the plurality of wireless LAN terminals of each of the plurality of the BSSs, and configured to collect radio information indicating interference states of respective radio waves, group sets of BSSs of the plurality of the BSSs, which are outside of radio wave reachable ranges of each other, as one of a plurality of groups among the plurality of the BSSs using the identical channel according to the radio information, and perform control to shift a timing of channel access for performing uplink multi-user transmission between the plurality of groups.Type: GrantFiled: August 15, 2019Date of Patent: May 14, 2024Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Shota Nakayama, Kenichi Kawamura, Yasushi Takatori, Keisuke Wakao
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Patent number: 11952423Abstract: A novel antibody that can be used as an anti-tumor agent and an anti-tumor agent that comprises, as an active ingredient, a molecule containing such an antibody.Type: GrantFiled: May 16, 2023Date of Patent: April 9, 2024Assignees: MIE UNIVERSITY, DAIICHI SANKYO COMPANY, LIMITEDInventors: Hiroshi Shiku, Yasushi Akahori, Kento Tanaka, Ayaka Yatsu, Junya Ichikawa, Toshiaki Ohtsuka, Shiho Kozuma, Ryuji Hashimoto, Makiko Nakayama, Naoya Shinozaki, Kensuke Nakamura, Ichiro Watanabe, Shinji Furuzono
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Patent number: 11955959Abstract: A parallel driving device that drives parallel-connected semiconductor elements includes a control unit and a gate driving circuit. The control unit detects a temperature difference between the semiconductor elements on the basis of detected values by temperature sensors that detect temperatures of the individual semiconductor elements. The control unit generates a control signal for changing the timing at which to turn on a first semiconductor element specified from the semiconductor elements on the basis of the temperature difference. The gate driving circuit generates a first driving signal for driving the semiconductor elements, and generates a second driving signal that is the first driving signal delayed on the basis of the control signal, and applies the second driving signal to the first semiconductor element.Type: GrantFiled: May 29, 2019Date of Patent: April 9, 2024Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Yasushi Nakayama, Yoshiko Tamada, Takayoshi Miki, Shota Morisaki, Yukio Nakashima, Kenta Uchida, Keisuke Kimura, Tomonobu Mihara
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Publication number: 20240099975Abstract: An object of the present invention is to provide an anti-tumor agent that exhibits a remarkably excellent anti-tumor effect. According to the present invention, there is provided an anti-tumor agent for curing cancer, the anti-tumor agent having a liposome which has an inner water phase and having an aqueous solution which is an outer water phase and disperses the liposome, in which the liposome encompasses topotecan or a salt thereof, a lipid constituting the liposome contains a lipid modified with polyethylene glycol, dihydrosphingomyelin, and cholesterol, the inner water phase contains an ammonium salt, and the topotecan or the salt thereof encompassed in the liposome is administered at a dose rate of 0.1 mg/m2 body surface area to 10 mg/m2 body surface area, in terms of topotecan per administration.Type: ApplicationFiled: November 22, 2023Publication date: March 28, 2024Applicant: FUJIFILM CorporationInventors: Susumu SHIMOYAMA, Keiko SUZUKI, Mikinaga MORI, Takeshi MATSUMOTO, Shinji NAKAYAMA, Yasushi MOROHASHI, Toshifumi KIMURA
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Patent number: 11938731Abstract: A substrate, a diaphragm, and a piezoelectric actuator are laminated in this order in a first direction, the diaphragm includes a first layer containing silicon as a constituent element, a second layer disposed between the first layer and the piezoelectric actuator, and containing any one or both of at least one metal element selected from the group made of chromium, titanium, aluminum, tantalum, hafnium, and iridium, and silicon nitride, as a constituent element, and a third layer disposed between the second layer and the piezoelectric actuator and containing zirconium as a constituent element, and a fourth layer containing any one or both of at least one metal element selected from the group made of chromium, titanium, aluminum, tantalum, hafnium, and iridium, and silicon nitride, as a constituent element is provided on the third layer on a piezoelectric actuator side.Type: GrantFiled: March 28, 2022Date of Patent: March 26, 2024Assignee: Seiko Epson CorporationInventors: Harunobu Koike, Masao Nakayama, Toshihiro Shimizu, Yasushi Yamazaki, Osamu Tonomura, Tatsuo Sawasaki, Chihiro Nishi
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Publication number: 20240067763Abstract: The solid titanium catalyst component (I) of the present invention contains titanium, magnesium, halogen, and a cyclic multiple-ester-group-containing compound (a) represented by the following formula (1).Type: ApplicationFiled: August 26, 2021Publication date: February 29, 2024Applicant: MITSUI CHEMICALS, INC.Inventors: Takashi KIMURA, Makoto ISOGAI, Yasushi NAKAYAMA, Kenji MICHIUE, Takashi JINNAI, Wataru YAMADA, Shotaro TAKANO, Hiroshi TERAO, Takaaki YANO, Yoshiyuki TOTANI, Sunil Krzysztof MOORTHI, Takashi NAKANO
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Publication number: 20240067764Abstract: A solid titanium catalyst component (I) for olefin polymer production contains titanium, magnesium, halogen, and a cyclic multiple-ester-group-containing compound (a) represented by the formula (1). Preferably, a propylene polymer that is obtained by the olefin polymerization method and has specific thermal properties as determined primarily by differential scanning calorimetry (DSC).Type: ApplicationFiled: December 21, 2021Publication date: February 29, 2024Applicant: MITSUI CHEMICALS, INC.Inventors: Takashi KIMURA, Makoto ISOGAI, Yasushi NAKAYAMA, Kenji MICHIUE, Takashi JINNAI, Wataru YAMADA, Shotaro TAKANO, Hiroshi TERAO, Takaaki YANO, Yoshiyuki TOTANI, Sunil Krzysztof MOORTHI, Takashi NAKANO
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Patent number: 11917682Abstract: Provided is a wireless LAN system in which an interference control signal transmitter that is provided in the surroundings of the wireless LAN base station and the wireless LAN terminal, and is configured to collect wireless environment information regarding the interfering AP/STA, and transmit, to the interfering AP/STA, an interference control signal that is to be used to set a transmission waiting period; and an interference control signal management device configured to collect the wireless environment information from the interference control signal transmitter, determine the interference control signal transmitter whose communication area includes the interfering AP/STA based on the wireless environment information, and control the determined interference control signal transmitter to transmit the interference control signal to be used to set the transmission waiting period that corresponds to a length of time of the communication between the wireless LAN base station and the wireless LAN terminal, wherType: GrantFiled: November 8, 2019Date of Patent: February 27, 2024Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Kenichi Kawamura, Yasushi Takatori, Tomoyuki Yamada, Hiroshi Nakamoto, Keisuke Wakao, Shota Nakayama
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Publication number: 20220231595Abstract: A parallel driving device that drives parallel-connected semiconductor elements includes a control unit and a gate driving circuit. The control unit detects a temperature difference between the semiconductor elements on the basis of detected values by temperature sensors that detect temperatures of the individual semiconductor elements. The control unit generates a control signal for changing the timing at which to turn on a first semiconductor element specified from the semiconductor elements on the basis of the temperature difference. The gate driving circuit generates a first driving signal for driving the semiconductor elements, and generates a second driving signal that is the first driving signal delayed on the basis of the control signal, and applies the second driving signal to the first semiconductor element.Type: ApplicationFiled: May 29, 2019Publication date: July 21, 2022Applicant: Mitsubishi Electric CorporationInventors: Yasushi NAKAYAMA, Yoshiko TAMADA, Takayoshi MIKI, Shota MORISAKI, Yukio NAKASHIMA, Kenta UCHIDA, Keisuke KIMURA, Tomonobu MIHARA
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Publication number: 20220173043Abstract: A semiconductor module parallel circuit includes: a plurality of power semiconductor modules; and a multilayer substrate that interconnects the plurality of power semiconductor modules, each of the power semiconductor modules includes: a power semiconductor switching element; a first signal terminal connected to a gate potential of the power semiconductor switching element; and a second signal terminal connected to a source potential of the power semiconductor switching element, the multilayer substrate includes: an external connection terminal; first signal terminal connection patterns connected to the first signal terminals of the power semiconductor modules; and second signal terminal connection patterns connected to the second signal terminals of the power semiconductor modules, and inductances of gate wiring for the plurality of power semiconductor modules, from the external connection terminal to the first signal terminal connection pattern and from the second signal terminal connection pattern to the eType: ApplicationFiled: March 29, 2019Publication date: June 2, 2022Applicant: Mitsubishi Electric CorporationInventors: Ryota HAMAGUCHI, Yasushi NAKAYAMA, Shuichi NAGAMITSU
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Patent number: 11346879Abstract: An increased accuracy in detecting deterioration of a semiconductor device can be achieved. A first metal pattern and a second metal pattern are connected to a controller. A bonding wire connects the first metal pattern and an emitter electrode. A linear conductor is connected between a first electrode pad and a second electrode pad. First bonding wires connect the first electrode pad and the second metal pattern. Second bonding wires connect the second electrode pad and the second metal pattern. The controller detects the deterioration of the semiconductor device when a potential difference between the first metal pattern and the second metal pattern is above a threshold.Type: GrantFiled: January 4, 2018Date of Patent: May 31, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Chihiro Kawahara, Takeshi Horiguchi, Yoshiko Tamada, Yasushi Nakayama
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Patent number: 11070046Abstract: A short-circuit protection circuit for a self-arc-extinguishing type semiconductor element includes a first protection circuit and a second protection circuit. The first protection circuit is configured to reduce a voltage between a control electrode and a first main electrode of the self-arc-extinguishing type semiconductor element when detecting overcurrent flowing between the first main electrode and a second main electrode. The second protection circuit is configured to: detect current flowing in an interconnection adapted to supply the drive voltage; determine, based on the detected current, whether the first protection circuit is in an operating state; and change the drive voltage to turn off the self-arc-extinguishing type semiconductor element when the first protection circuit is in the operating state.Type: GrantFiled: September 11, 2014Date of Patent: July 20, 2021Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Yoshitaka Naka, Yasushi Nakayama, Yoshiko Tamada, Hiroyuki Takagi, Junichiro Ishikawa, Kazuhiro Otsu, Naohiko Mitomi
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Patent number: 11063025Abstract: Gates of a plurality of semiconductor switching elements are electrically connected to a common gate control pattern by gate wires. Sources of the plurality of semiconductor switching elements are electrically connected to a common source control pattern by source wires. The gate control pattern is disposed to interpose the source control pattern between the gate control pattern and each of the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel. Hence, each of the gate wires becomes longer than each of the source wires, and has an inductance larger than the source wire. Accordingly, gate oscillation is reduced or suppressed in the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel.Type: GrantFiled: August 27, 2018Date of Patent: July 13, 2021Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Junichi Nakashima, Shota Morisaki, Yoshiko Tamada, Yasushi Nakayama, Tetsu Negishi, Ryo Tsuda, Yukimasa Hayashida, Ryutaro Date
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Patent number: 10978364Abstract: A semiconductor module is obtained in which breakage of the semiconductor module can be detected in advance while suppressing increase in manufacturing cost. A semiconductor module includes a semiconductor element, a circuit board, a resistor, a first wiring member, and a detector. The circuit board includes a circuit pattern. The resistor is connected to a surface of the circuit pattern. The first wiring member directly connects the resistor to the semiconductor element. In the first wiring member, at least part of current flowing from the semiconductor element to the circuit pattern flows. The detector is configured to detect at least one of a change of a voltage drop value in the resistor and a change of a current value in the resistor.Type: GrantFiled: May 23, 2018Date of Patent: April 13, 2021Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Akihisa Fukumoto, Yasushi Nakayama, Hiroshi Kobayashi
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Patent number: 10804186Abstract: Provided are a semiconductor module capable of further increasing an effect of canceling out a parasitic inductance by a current and a power converter including the semiconductor module. The semiconductor module includes a first leadframe, a second leadframe, a third leadframe, an insulating material, a first semiconductor element, and a second semiconductor element. The first leadframe is a plate-shaped wiring path to which a first potential is applied. The second leadframe is a plate-shaped wiring path including an output terminal. The third leadframe is a plate-shaped wiring path to which a second potential is applied. The first semiconductor element is directly joined to the first leadframe with a joint material therebetween, and the second semiconductor element is directly joined to the second leadframe with a joint material therebetween. The first leadframe and the second leadframe face each other with the insulating material therebetween.Type: GrantFiled: January 12, 2018Date of Patent: October 13, 2020Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Shinya Yano, Yasushi Nakayama
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Publication number: 20200273760Abstract: A semiconductor module is obtained in which breakage of the semiconductor module can be detected in advance while suppressing increase in manufacturing cost. A semiconductor module includes a semiconductor element, a circuit board, a resistor, a first wiring member, and a detector. The circuit board includes a circuit pattern. The resistor is connected to a surface of the circuit pattern. The first wiring member directly connects the resistor to the semiconductor element. In the first wiring member, at least part of current flowing from the semiconductor element to the circuit pattern flows. The detector is configured to detect at least one of a change of a voltage drop value in the resistor and a change of a current value in the resistor.Type: ApplicationFiled: May 23, 2018Publication date: August 27, 2020Applicant: Mitsubishi Electric CorporationInventors: Akihisa FUKUMOTO, Yasushi NAKAYAMA, Hiroshi KOBAYASHI
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Publication number: 20200266135Abstract: Provided are a semiconductor module capable of further increasing an effect of canceling out a parasitic inductance by a current and a power converter including the semiconductor module. The semiconductor module includes a first leadframe, a second leadframe, a third leadframe, an insulating material, a first semiconductor element, and a second semiconductor element. The first leadframe is a plate-shaped wiring path to which a first potential is applied. The second leadframe is a plate-shaped wiring path including an output terminal. The third leadframe is a plate-shaped wiring path to which a second potential is applied. The first semiconductor element is directly joined to the first leadframe with a joint material therebetween, and the second semiconductor element is directly joined to the second leadframe with a joint material therebetween. The first leadframe and the second leadframe face each other with the insulating material therebetween.Type: ApplicationFiled: January 12, 2018Publication date: August 20, 2020Applicant: Mitsubishi Electric CorporationInventors: Shinya YANO, Yasushi NAKAYAMA
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Patent number: 10727213Abstract: Gates of semiconductor switching elements are connected to a gate control wiring pattern. The gate control wiring pattern is further connected to a gate control terminal and a filter terminal which are connected by an element for forming a filter outside a housing. The filter terminal and the gate control terminal are connected to the gate control wiring pattern in such a manner that a section electrically connecting the filter terminal and the gate control terminal overlaps with at least a part of a section electrically connecting the gates of the semiconductor switching elements on the gate control wiring pattern.Type: GrantFiled: September 15, 2017Date of Patent: July 28, 2020Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Junichi Nakashima, Yoshiko Tamada, Yasushi Nakayama
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Patent number: 10700678Abstract: A voltage driver shifts a voltage on a gate as a control terminal of a power semiconductor element in response to an ON command or an OFF command. A gate voltage detector generates a detection signal of a gate-emitter voltage. A delay signal generator generates a delay signal obtained by adding a delay time to the detection signal. A subtractor generates a voltage difference signal between the detection signal and the delay signal. When the voltage difference signal exceeds a reference voltage during an operation of turning on the power semiconductor element, a short-circuit state detector detects a hard-switching fault.Type: GrantFiled: May 30, 2016Date of Patent: June 30, 2020Assignee: Mitsubishi Electric CorporationInventors: Takeshi Horiguchi, Yasushi Nakayama
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Publication number: 20200185359Abstract: Gates of a plurality of semiconductor switching elements are electrically connected to a common gate control pattern by gate wires. Sources of the plurality of semiconductor switching elements are electrically connected to a common source control pattern by source wires. The gate control pattern is disposed to interpose the source control pattern between the gate control pattern and each of the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel. Hence, each of the gate wires becomes longer than each of the source wires, and has an inductance larger than the source wire. Accordingly, gate oscillation is reduced or suppressed in the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel.Type: ApplicationFiled: August 27, 2018Publication date: June 11, 2020Applicant: Mitsubishi Electric CorporationInventors: Junichi NAKASHIMA, Shota MORISAKI, Yoshiko TAMADA, Yasushi NAKAYAMA, Tetsu NEGISHI, Ryo TSUDA, Yukimasa HAYASHIDA, Ryutaro DATE