Abstract: There is disclosed a multiplier having a digit rounding function which operates by selecting an added value for rounding a digit in the process of adding partial products, thereby reducing a circuit magnitude and realizing a high-speed operation. A multiplier 13 is provided with selection circuits 18, 19 and 1A which can switch values of the partial products obtained in a secondary Booth algorithm in response to a signal for controlling the presence of the digit rounding function.

Abstract: A heating device used for a gas phase growing mechanism or a heat treatment mechanism comprising a tubular reactor made of a heat resistant and chemically inert material incorporating a support having a plurality of works set and arranged thereon to be put to gas phase growing or heat treatment, a cylindrical main heating furnace body disposed so as to surround the outer circumferential surface of the tubular reactor 1 at the entire length thereof, and a pair of auxiliary heating furnace bodies each closing both longitudinal opening ends of the cylindrical main heating body, whereby the cylindrical main heating furnace body and the pair of auxiliary heating furnace bodies constitute a heating furnace for confining the tubular reactor therein.

Abstract: A multiplying system based on the Booth's algorithm, comprises a Booth's decoder having a first input receiving a multiplier "Y" and a second input receiving a mode signal designating either a first multiplication of "X.times.Y" (where "X" is a multiplicand) or a second multiplication of "-X.times.Y". The Booth's decoder generates a Booth's decoded value and a sign selection signal to a partial product generation circuit which also receives the multiplicand "X", so that the partial product generation circuit generates either a first partial product of "X.times.Y" or a second partial product of "-X.times.Y" in accordance with the sign selection signal. An output of the partial product generation circuit is summed by a partial product summing circuit, and an output of the partial product summing circuit is added to a value "A" stored in an output register by an arithmetic unit. Thus, the accumulating multiplication "A=A.+-.X.times.

Abstract: This shift amount detector determines the shift amount to normalize binary bit data. It is provided with means to add, to an n bit data to be normalized, at least one bit of logical value "0" on the side of the least significant bit. The data with additional logical value "0" has its bits reversed by the bit reversing circuit when the data is negative or positive. The data with the additional logical value "0" is input to the bit detecting circuit as it is or as data with reversed bits according to the selection by the selecting circuit. The bit detecting circuit detects the bit position where "1" or "0" appears for the first time by searching the bits one by one starting from the most significant bit and outputs the result of detection to the shift amount calculating circuit. The shift amount calculating circuit determines the shift amount based on the detected bit position.