Patents by Inventor Yasusi Sekine

Yasusi Sekine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of manufacturing a semiconductor integrated circuit device
    Patent number: 5342480
    Abstract: An isolation and flattening technique for a semiconductor substrate having active devices, such as a bipolar transistor, and a MISFET, formed thereon, is disclosed.
    Type: Grant
    Filed: June 1, 1993
    Date of Patent: August 30, 1994
    Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.
    Inventors: Hirotaka Nishizawa, Seiichiro Azuma, Takayuki Yoshitake, Kazuo Tanaka, Mikinori Kawaji, Sinmei Hirano, Toshio Yamada, Yasusi Sekine