Patents by Inventor Yasusuke Sumitomo

Yasusuke Sumitomo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4252595
    Abstract: An etching device uses a gas activated by a plasma for etching semiconductor elements. The apparatus includes etching chamber in which semiconductor elements are horizontally held by a supporting plate or conveyer and etched. The etching gas introduced from the upper side of the semiconductor element to the down side thereof through holes formed in the supporting plate or conveyer.
    Type: Grant
    Filed: March 28, 1978
    Date of Patent: February 24, 1981
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Shinichi Yamamoto, Yasusuke Sumitomo, Yasuhiro Horiike, Masahiro Shibagaki
  • Patent number: 4216491
    Abstract: A semiconductor integrated circuit which includes a plurality of island regions surrounded by a bottom dish-like dielectric layer formed on one side of a support body. A transistor element is formed in the island region, and the collector region of the transistor element is formed more adjacent to one surface of the island region than the other regions. The emitter and base electrodes of the transistor element are respectively led out from the bottom side of the island region to the surface of the support body using interior leads. The method for manufacturing the above-described device is also disclosed.
    Type: Grant
    Filed: August 31, 1978
    Date of Patent: August 5, 1980
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Takashi Matsuda, Kazuo Niwa, Yasusuke Sumitomo
  • Patent number: 4185294
    Abstract: A semiconductor device comprises a semiconductor substrate, an insulating layer formed on one surface of the semiconductor substrate, a wiring layer formed on at least a portion of that area of the semiconductor substrate where no insulating layer is formed and having substantially the same thickness as that of the insulating layer, an insulating film formed flat on the insulating layer and wiring layer in a manner that it occupies grooves between the insulating layer and the wiring layer, an intermediate insulating layer formed on the insulating film, and another wiring layer formed on the intermediate insulating layer. The semiconductor device has a rupture-free multi-layer structure which exhibits an excellent electrical property.
    Type: Grant
    Filed: April 17, 1978
    Date of Patent: January 22, 1980
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Yasusuke Sumitomo, Yoshie Ohashi
  • Patent number: 4151034
    Abstract: A continuous gas plasma etching apparatus comprising a reaction chamber having an inlet means and an outlet means, an activation portion disposed at a distance from said reaction chamber, a distributor means for uniformly supplying said reaction chamber with an activated gas produced in said activation proton, an exhaust means for exhausting the gas inside said reaction chamber from a plurality of gas outlets, a conveyer means disposed inside said reaction chamber to transfer workpieces from the inlet means side to the outlet means side in said reaction chamber, a feeding chamber disposed on the inlet means side of said reaction chamber to contain the workpieces, a workpiece feeding means for feeding the workpieces in said feeding chamber from said inlet means to said conveyer means, a first shutter means for opening and shutting said inlet means, a receiving chamber disposed on the outlet means side of said reaction chamber to receive the workpieces treated with said activated gas in said reaction chamber, a
    Type: Grant
    Filed: December 19, 1977
    Date of Patent: April 24, 1979
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Shinichi Yamamoto, Yasusuke Sumitomo, Yasuhiro Horiike, Masahiro Shibagaki
  • Patent number: 4131909
    Abstract: A semiconductor integrated circuit includes first and second island regions, surrounded by a bottomed dishlike dielectric layer formed on one side of a support body. A MOS transistor element is formed in the first island region, whose gate region is located at the bottom side of the island region. The gate electrode is connected to a bottom portion of the second island region, which is used as a gate electrode contact region, in the support body using a interconnection lead. There is a method for manufacturing the above device.
    Type: Grant
    Filed: October 26, 1976
    Date of Patent: December 26, 1978
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Takashi Matsuda, Kazuo Niwa, Yasusuke Sumitomo
  • Patent number: 4123565
    Abstract: A semiconductor device comprises a semiconductor substrate, an insulating layer formed on one surface of the semiconductor substrate, a wiring layer formed on at least a portion of that area of the semiconductor substrate where no insulating layer is formed and having substantially the same thickness as that of the insulating layer, an insulating film formed flat on the insulating layer and wiring layer in a manner that it occupies grooves between the insulating layer and the wiring layer, an intermediate insulating layer formed on the insulating film, and another wiring layer formed on the intermediate insulating layer. The semiconductor device has a rupture-free multi-layer structure which exhibits an excellent electrical property.
    Type: Grant
    Filed: December 9, 1976
    Date of Patent: October 31, 1978
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Yasusuke Sumitomo, Yoshie Ohashi
  • Patent number: 4094722
    Abstract: An etching device uses a gas activated by a plasma for etching a semiconductor element. The apparatus includes object feeding and etching chambers formed on the opposite sides of an airtight flat chamber and a support plate rotatably mounted in the flat chamber to bring the semiconductor element from the feeding chamber to the etching chamber in which the semiconductor element is etched by the vertically flowing activated gas.
    Type: Grant
    Filed: January 26, 1977
    Date of Patent: June 13, 1978
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Shinichi Yamamoto, Yasusuke Sumitomo, Yasuhiro Horiike, Masahiro Shibagaki