Abstract: A timing controller for a liquid-crystal display panel includes a data enable signal detection circuit which detects a data enable signal applied to the timing controller, and a timing generating circuit which controls a display timing of image data to be displayed on the liquid-crystal display panel on the basis of the data enable signal detected by the data enable signal detection circuit.

Abstract: A liquid crystal display apparatus includes a plurality of pixels arranged in matrix form including respective transistors, a plurality of gate bus lines, each of which is coupled to gates of the transistors arranged in a corresponding single row, a plurality of data bus lines, each of which is coupled to one end of channels of the transistors arranged in a corresponding single column, a gate driver configured to successively drive the plurality of gate bus lines, and a timing control circuit configured to supply to the gate driver a timing signal indicative of a start of the successive driving of the plurality of gate bus lines and to mask the timing signal for a predetermined time period following the supplying of the timing signal.

Abstract: A plurality of gate driver boards are bonded to a first side of a TFT substrate, and a wiring board made of a flexible printed wiring board is bonded between the gate driver boards. Then, a wiring disposed on the wiring board provides connection between adjacent gate .driver boards. In the same manner, a plurality of data driver boards are bonded to a second side of the TFT substrate, and a wiring board made of a flexible printed wiring board is bonded between the data driver boards. Then, a wiring disposed on the wiring board provides connection between adjacent data driver boards.

Abstract: The liquid crystal display device has a liquid crystal panel in which liquid crystal cells are disposed in intersection areas of scanning lines and data lines, respectively. A picture signal and a synchronous signal are supplied via external terminals, respectively. A timing controller generates a driving timing of the scanning lines and a driving timing of the data lines in response to the synchronous signal. Further, the timing controller varies at least one of the driving timing of the scanning lines and the driving timing of the data lines according to a cycle of the synchronous signal in order to keep a writing time of the picture signal supplied to the liquid crystal cells constant. Therefore, it is possible to keep the writing time constant even when the cycle of the synchronous signal varies, which can prevent the deterioration in display quality.

Abstract: A backlight driving circuit is controlled by a timing controller and execute on/off control of the backlights. The timing controller detects, using the synchronous signal, change in a blank period which is of one frame period for display of one screen and during which the image signal is not transmitted. Upon detecting the change in the blank period, the timing controller adjusts on-periods of the backlights in order to make brightness of the backlights equal to one another. Consequently, the backlights have equal brightness with one other in spite of the change in the blank period. This makes the lives of the backlights equal to one another. In a case where the plural backlights constitute a backlight unit, it is able to prevent reduction in life of the backlight unit. Further, it is also possible to prevent brightness of the backlights from being differentiated even through a long-term use.

Abstract: A timing controller for a liquid-crystal display panel includes a data enable signal detection circuit which detects a data enable signal applied to the timing controller, and a timing generating circuit which controls a display timing of image data to be displayed on the liquid-crystal display panel on the basis of the data enable signal detected by the data enable signal detection circuit.

Abstract: A timing controller for a liquid-crystal display panel includes a data enable signal detection circuit which detects a data enable signal applied to the timing controller, and a timing generating circuit which controls a display timing of image data to be displayed on the liquid-crystal display panel on the basis of the data enable signal detected by the data enable signal detection circuit.

Abstract: An illumination device is provided which can reduce a movement blur and a tailing phenomenon on a motion picture display while a drop in display brightness is suppressed, and which can suppress power consumption, can be made small and light, and can prolong the lifetime, and a liquid crystal display device using the same is provided. A light source control part of a control circuit synchronizes a latch pulse signal outputted from a gate driver control part to a gate driver, and outputs light emission control signals to respective light source power supply circuits. The respective light source power supply circuits change emission states of cold cathode fluorescent lamps to one of a first to a third emission states on the basis of the inputted light emission control signals, and illuminate an LCD panel from a rear surface of a display area.

Abstract: Polarity patterns (polarity pattern signal POL) are stored in a ROM in a polarity pattern controlling portion. Then, the polarity pattern is changed according to applications of a liquid crystal display panel. Since the polarity pattern is stored in the ROM, the polarity pattern can be changed without modification of a hardware. Also, two sets of polarity patterns or more are stored in the ROM, and then any one polarity pattern can be output according to the application. In addition, the polarity pattern signal POL and image signals RGB are compared with each other, and then the polarity pattern which is to be read from the ROM is switched according to the result.

Abstract: A drive control circuit supplies a gate voltage so that display quality is not degraded even in a case where a vertical scanning frequency or a horizontal scanning frequency is changed. The circuit includes a timing controller for detecting a change of a horizontal scanning frequency, a gate voltage generating circuit for generating two kinds of gate-on voltages Va and Vb (Va<Vb), and a switch for outputting one of the gate-on voltages Va and Vb from the gate voltage generating circuit in accordance with an output of the timing controller. The timing controller includes a counter for counting the number of clocks for one horizontal period, and a comparator for comparing a count result with a threshold value. When the horizontal scanning frequency is in a normal state, the low gate-on voltage Va is outputted, and when the horizontal scanning frequency exceeds a predetermined threshold value, that is, the count value falls below a threshold value, the high gate-on voltage Vb is outputted.

Abstract: Polarity patterns (polarity pattern signal POL) are stored in a ROM in a polarity pattern controlling portion. Then, the polarity pattern is changed according to applications of a liquid crystal display panel. Since the polarity pattern is stored in the ROM, the polarity pattern can be changed without modification of a hardware. Also, two sets of polarity patterns or more are stored in the ROM, and then any one polarity pattern can be output according to the application. In addition, the polarity pattern signal POL and image signals RGB are compared with each other, and then the polarity pattern which is to be read from the ROM is switched according to the result.

Abstract: A circuit for driving a liquid crystal display panel includes a plurality of output circuits that are coupled to respective data bus lines of the liquid crystal display panel, and output liquid crystal drive signals to the respective data bus lines with respective delays that progressively increase from a first one of the data bus lines to a last one of the data bus lines.

Abstract: A drive circuit device for a display device which drives a plurality of source bus lines provided on a display panel, the drive circuit device comprises: a driver unit(20) that receives a clock signal, a data signal and a control signal, and sequentially fetches the data signal, and generates drive signals for the source bus lines in accordance to the fetched data signal; and a gate unit(22) that, after elapse of specified time from the reception of the driver unit, and at a timing when a rear-stage drive circuit device starts receiving, starts outputting of a propagation signal including at least one of the clock signal, data signal and control signal to the rear-stage drive circuit device. Consequently, the power consumption required for supplying these signals and the generated amount of electromagnetic waves resulting from the signal supply can be suppressed.

Abstract: A liquid crystal display device converts input signals into liquid crystal drive signals so as to display an image on a liquid crystal panel. A plurality of flexible boards are connected to the liquid crystal panel, each of the flexible boards having a drive IC which converts the input signals into the liquid crystal drive signals. A connection board is connected to the liquid crystal panel so as to supply the input signals to first input lines formed on the liquid crystal panel. Each of the flexible boards has second input signal lines for supplying the input signals to the drive IC; a first end of each of the second input signal lines is connected to a respective one of a first group of the first input signal lines.

Abstract: A data driving part takes in image display data in response to a clock signal supplied, and causes an image display part to display an image according to the image display data. A control part detects a change pattern of the image display data, and adjusts a phase relationship between the clock signal and image display data according to the detected change pattern.

Abstract: A timing controller for a liquid-crystal display panel includes a data enable signal detection circuit which detects a data enable signal applied to the timing controller, and a timing generating circuit which controls a display timing of image data to be displayed on the liquid-crystal display panel on the basis of the data enable signal detected by the data enable signal detection circuit.