Patents by Inventor Yasuto Miyake

Yasuto Miyake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240085906
    Abstract: A reception processing unit receives a user operation performed with respect to an operation tool that causes a work vehicle to execute a predetermined motion. A motion processing unit causes the work vehicle to execute a motion corresponding to the user operation performed with respect to the operation tool. A travel processing unit switches from autonomous travel to manual travel when a change amount relating to the operation tool corresponding to the user operation exceeds a threshold while the work vehicle is performing autonomous travel. A setting processing unit sets the threshold based on at least one of setting information and work information of the work vehicle.
    Type: Application
    Filed: September 11, 2023
    Publication date: March 14, 2024
    Applicant: Yanmar Holdings Co., Ltd.
    Inventors: Koji Miyake, Yasuto Nishii, Kenichi Miyai
  • Patent number: 9871403
    Abstract: A power feeding apparatus for solar cells has: a voltage regulator, i.e., a voltage adjusting unit; a relay, i.e., a switch unit; and a control unit. The voltage regulator executes voltage adjustment with respect to an input voltage, and outputs, to a power output terminal, a voltage adjusted to a previously set voltage or lower. The relay is provided on a bypass line that is connected between a power input terminal and the power output terminal without having the voltage regulator therebetween, and the relay performs switching such that the bypass line is connected or interrupted. In the cases where the input voltage is equal to or lower than the predetermined voltage, the control unit performs control such that the bypass line is connected by means of the relay, and the input voltage is outputted from the power output terminal.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: January 16, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Naoya Sotani, Yasuto Miyake
  • Publication number: 20160094084
    Abstract: A power feeding apparatus for solar cells has: a voltage regulator, i.e., a voltage adjusting unit; a relay, i.e., a switch unit; and a control unit. The voltage regulator executes voltage adjustment with respect to an input voltage, and outputs, to a power output terminal, a voltage adjusted to a previously set voltage or lower. The relay is provided on a bypass line that is connected between a power input terminal and the power output terminal without having the voltage regulator therebetween, and the relay performs switching such that the bypass line is connected or interrupted. In the cases where the input voltage is equal to or lower than the predetermined voltage, the control unit performs control such that the bypass line is connected by means of the relay, and the input voltage is outputted from the power output terminal.
    Type: Application
    Filed: December 7, 2015
    Publication date: March 31, 2016
    Inventors: Naoya SOTANI, Yasuto MIYAKE
  • Publication number: 20150000737
    Abstract: A solar cell includes a photoelectric conversion body and an electrode. One principal surface of the photoelectric conversion body includes a silicon surface made of silicon. The electrode is disposed on the photoelectric conversion body. The electrode includes a tin oxide layer and a metal layer. The tin oxide layer is disposed on the silicon surface. The metal layer is disposed on the tin oxide layer. The tin oxide layer includes a first tin oxide layer and a second tin oxide layer. The second tin oxide layer is stacked on the first tin oxide layer. The oxygen concentration in the second tin oxide layer is lower than that in the first tin oxide layer. At least of one of the surfaces of the tin oxide layer comprises the second tin oxide layer.
    Type: Application
    Filed: September 15, 2014
    Publication date: January 1, 2015
    Inventors: Yasuto MIYAKE, Takahiro MISHIMA
  • Patent number: 8750343
    Abstract: A nitride-based semiconductor light-emitting device capable of suppressing complication of a manufacturing process and reduction of luminous efficiency is obtained. This nitride-based semiconductor light-emitting device (50) includes a nitride-based semiconductor device layer (23) formed on a main surface of a (1-100) plane of a substrate (21), having a light-emitting layer (26) having a main surface of a (1-100) plane, a facet (50a) formed on an end of a region including the light-emitting layer (26) of the nitride-based semiconductor device layer (23), formed by a (000-1) plane extending in a direction substantially perpendicular to the main surface ((1-100) plane) of the light-emitting layer (26), and a reflection surface (50c) formed on a region opposed to the facet (50a) of the (000-1) plane, formed by a growth surface of the nitride-based semiconductor device layer (23), extending in a direction inclined at an angle ?1 (about) 62° with respect to the facet (50a).
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: June 10, 2014
    Assignee: Future Light, LLC
    Inventors: Ryoji Hiroyama, Yasuto Miyake, Yasumitsu Kuno, Yasuyuki Bessho, Masayuki Hata
  • Patent number: 8445303
    Abstract: A method of manufacturing a semiconductor device includes steps of forming a semiconductor device layer on an upper surface of a substrate including the upper surface, a lower surface and a dislocation concentrated region arranged so as to part a first side closer to the upper surface and a second side closer to the lower surface, exposing a portion where the dislocation concentrated region does not exist above on the lower surface by removing the substrate on the second side along with at least a part of the dislocation concentrated region, and forming an electrode on the portion.
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: May 21, 2013
    Assignee: Future Light, LLC
    Inventors: Yasuto Miyake, Ryoji Hiroyama, Masayuki Hata
  • Publication number: 20120142167
    Abstract: A method of manufacturing a semiconductor device includes steps of forming a semiconductor device layer on an upper surface of a substrate including the upper surface, a lower surface and a dislocation concentrated region arranged so as to part a first side closer to the upper surface and a second side closer to the lower surface, exposing a portion where the dislocation concentrated region does not exist above on the lower surface by removing the substrate on the second side along with at least a part of the dislocation concentrated region, and forming an electrode on the portion.
    Type: Application
    Filed: February 6, 2012
    Publication date: June 7, 2012
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Yasuto MIYAKE, Ryoji Hiroyama, Masayuki Hata
  • Patent number: 8134171
    Abstract: A method of manufacturing a semiconductor device includes steps of forming a semiconductor device layer on an upper surface of a substrate including the upper surface, a lower surface and a dislocation concentrated region arranged so as to part a first side closer to the upper surface and a second side closer to the lower surface, exposing a portion where the dislocation concentrated region does not exist above on the lower surface by removing the substrate on the second side along with at least a part of the dislocation concentrated region, and forming an electrode on the portion.
    Type: Grant
    Filed: May 11, 2011
    Date of Patent: March 13, 2012
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yasuto Miyake, Ryoji Hiroyama, Masayuki Hata
  • Patent number: 8022427
    Abstract: A nitride-based semiconductor device includes a substrate, a first step portion formed on a main surface side of a first side end surface of the substrate, a second step portion formed on the main surface side of a second side end surface substantially parallel to the first side end surface on an opposite side of the first side end surface and a nitride-based semiconductor layer whose first side surface is a (000-1) plane starting from a first side wall of the first step portion and a second side surface starting from a second side wall of the second step portion on the main surface.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: September 20, 2011
    Assignee: Sanyoelectric Co., Ltd.
    Inventors: Yasuto Miyake, Ryoji Hiroyama, Masayuki Hata, Yasumitsu Kuno
  • Patent number: 8013344
    Abstract: A method of manufacturing a semiconductor device includes steps of forming a semiconductor device layer on an upper surface of a substrate including the upper surface, a lower surface and a dislocation concentrated region arranged so as to part a first side closer to the upper surface and a second side closer to the lower surface, exposing a portion where the dislocation concentrated region does not exist above on the lower surface by removing the substrate on the second side along with at least a part of the dislocation concentrated region, and forming an electrode on the portion.
    Type: Grant
    Filed: August 5, 2008
    Date of Patent: September 6, 2011
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yasuto Miyake, Ryoji Hiroyama, Masayuki Hata
  • Publication number: 20110210365
    Abstract: A method of manufacturing a semiconductor device includes steps of forming a semiconductor device layer on an upper surface of a substrate including the upper surface, a lower surface and a dislocation concentrated region arranged so as to part a first side closer to the upper surface and a second side closer to the lower surface, exposing a portion where the dislocation concentrated region does not exist above on the lower surface by removing the substrate on the second side along with at least a part of the dislocation concentrated region, and forming an electrode on the portion.
    Type: Application
    Filed: May 11, 2011
    Publication date: September 1, 2011
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Yasuto Miyake, Ryoji Hiroyama, Masayuki Hata
  • Patent number: 7885304
    Abstract: A nitride-based semiconductor laser device includes a nitride-based semiconductor layer formed on a main surface of a substrate and having an emission layer, wherein the nitride-based semiconductor layer includes a first side surface formed by a (000-1) plane and a second side surface inclined with respect to the first side surface, and a ridge having an optical waveguide extending perpendicular to a [0001] direction in an in-plane direction of the main surface of the substrate is formed by a region held between the first side surface and the second side surface.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: February 8, 2011
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yasuto Miyake, Ryoji Hiroyama, Masayuki Hata, Yasumitsu Kuno
  • Publication number: 20100265981
    Abstract: A nitride-based semiconductor light-emitting diode capable of suppressing complication of a manufacturing process while improving light extraction efficiency from a light-emitting layer and further improving flatness of a semiconductor layer is obtained. This nitride-based semiconductor light-emitting diode (30) includes a substrate (11) formed with a recess portion (21) on a main surface and a nitride-based semiconductor layer (12) having a light-emitting layer (14) on the main surface and including a first side surface (12a) having a (000-1) plane formed to start from a first inner side surface (21a) of the recess portion and a second side surface (12b) formed at a region opposite to the first side surface with the light-emitting layer therebetween to start from a second inner side surface (21b) of the recess portion on the main surface.
    Type: Application
    Filed: December 12, 2008
    Publication date: October 21, 2010
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Ryoji Hiroyama, Yasuto Miyake, Yasumitsu Kunoh, Yasuyuki Bessho, Masayuki Hata
  • Publication number: 20100246624
    Abstract: A nitride-based semiconductor light-emitting device capable of suppressing complication of a manufacturing process and reduction of luminous efficiency is obtained. This nitride-based semiconductor light-emitting device (50) includes a nitride-based semiconductor device layer (23) formed on a main surface of a (1-100) plane of a substrate (21), having a light-emitting layer (26) having a main surface of a (1-100) plane, a facet (50a) formed on an end of a region including the light-emitting layer (26) of the nitride-based semiconductor device layer (23), formed by a (000-1) plane extending in a direction substantially perpendicular to the main surface ((1-100) plane) of the light-emitting layer (26), and a reflection surface (50c) formed on a region opposed to the facet (50a) of the (000-1) plane, formed by a growth surface of the nitride-based semiconductor device layer (23), extending in a direction inclined at an angle ?1 (about) 62° with respect to the facet (50a).
    Type: Application
    Filed: September 25, 2008
    Publication date: September 30, 2010
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Ryoji Hiroyama, Yasuto Miyake, Yasumitsu Kuno, Yasuyuki Bessho, Masayuki Hata
  • Publication number: 20100193833
    Abstract: A nitride-based semiconductor device includes a substrate made of a nitride-based semiconductor, a device layer formed on the substrate, and an electrode formed on a surface of the substrate opposite to the device layer. The substrate includes a first surface having a nonpolar plane or a semipolar plane, a second surface opposite to the first surface, a defect concentration region extending in a direction inclined with respect to a normal direction of the first surface from the first surface toward the second surface and penetrating to the second surface and a current path region separated from other region of the substrate by the defect concentration region employed as a boundary, the defect concentration region is not exposed on the first surface, and the electrode is formed on the second surface in the current path region.
    Type: Application
    Filed: February 1, 2010
    Publication date: August 5, 2010
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Yasuto MIYAKE, Yasumitsu KUNOH, Masayuki HATA
  • Publication number: 20090267100
    Abstract: A nitride-based semiconductor device includes a substrate, a first step portion formed on a main surface side of a first side end surface of the substrate, a second step portion formed on the main surface side of a second side end surface substantially parallel to the first side end surface on an opposite side of the first side end surface and a nitride-based semiconductor layer whose first side surface is a (000-1) plane starting from a first side wall of the first step portion and a second side surface starting from a second side wall of the second step portion on the main surface.
    Type: Application
    Filed: April 24, 2009
    Publication date: October 29, 2009
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Yasuto Miyake, Ryoji Hiroyama, Masayuki Hata, Yasumitsu Kuno
  • Publication number: 20090245310
    Abstract: A nitride-based semiconductor laser device includes a nitride-based semiconductor layer formed on a main surface of a substrate and having an emission layer, wherein the nitride-based semiconductor layer includes a first side surface formed by a (000-1) plane and a second side surface inclined with respect to the first side surface, and a ridge having an optical waveguide extending perpendicular to a [0001] direction in an in-plane direction of the main surface of the substrate is formed by a region held between the first side surface and the second side surface.
    Type: Application
    Filed: March 31, 2009
    Publication date: October 1, 2009
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Yasuto Miyake, Ryoji Hiroyama, Masayuki Hata, Yasumitsu Kuno
  • Publication number: 20090039473
    Abstract: A method of manufacturing a semiconductor device includes steps of forming a semiconductor device layer on an upper surface of a substrate including the upper surface, a lower surface and a dislocation concentrated region arranged so as to part a first side closer to the upper surface and a second side closer to the lower surface, exposing a portion where the dislocation concentrated region does not exist above on the lower surface by removing the substrate on the second side along with at least a part of the dislocation concentrated region, and forming an electrode on the portion.
    Type: Application
    Filed: August 5, 2008
    Publication date: February 12, 2009
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Yasuto Miyake, Ryoji Hiroyama, Masayuki Hata
  • Publication number: 20090028204
    Abstract: A semiconductor laser device includes a substrate made of a nitride-based semiconductor and a waveguide formed on a principal surface of the substrate, wherein the substrate includes a dislocation concentrated region arranged so as to obliquely extend with respect to the principal surface of the substrate, and the waveguide is so formed as to be located above the dislocation concentrated region and also located on a region except a portion where the dislocation concentrated region is present in the principal surface of the substrate.
    Type: Application
    Filed: July 24, 2008
    Publication date: January 29, 2009
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Ryoji Hiroyama, Yasuhiko Nomura, Masayuki Hata, Yasuto Miyake