Patents by Inventor Yasuyuki Iwata

Yasuyuki Iwata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Single crystal pulling apparatus and pulling method
    Patent number: 6565650
    Abstract: A single crystal pulling apparatus comprising, a laser unit 46 emitting a beam with a wavelength of 550 nm or less to form a spot on the surface of said melt, a spot camera 47 capturing the spot to produce electrical image signals corresponding thereto, an image processor 50 processing the electrical image signals to produce image data, and a control unit 49 receiving the image data and calculating a current melt level so that a crucible shaft lift 8 moves a crucible shaft up and down to adjust the melt level in accordance with the predetermined melt level.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: May 20, 2003
    Assignee: Toshiba Ceramics Co., Ltd.
    Inventors: Hiroyuki Miura, Yasuyuki Iwata, Shinsuke Kondoh
  • Single crystal pulling apparatus and pulling method
    Publication number: 20010054376
    Abstract: A single crystal pulling apparatus comprising, a laser unit 46 emitting a beam with a wavelength of 550 nm or less to form a spot on the surface of said melt, a spot camera 47 capturing the spot to produce electrical image signals corresponding thereto, an image processor 50 processing the electrical image signals to produce image data, and a control unit 49 receiving the image data and calculating a current melt level so that a crucible shaft lift 8 moves a crucible shaft up and down to adjust the melt level in accordance with the predetermined melt level.
    Type: Application
    Filed: June 20, 2001
    Publication date: December 27, 2001
    Applicant: TOSHIBA CERAMICS CO., LTD.
    Inventors: Hiroyuki Miura, Yasuyuki Iwata, Shinsuke Kondoh
  • Translation look-aside buffer control system with multiple prioritized buffers
    Patent number: 4980816
    Abstract: An address translation buffer control system includes multiple prioritized address translation buffers and circuitry for changing the contents of the buffers. When a desired address translation pair is not present in the buffer having the highest priority, the contents of the highest priority buffer are replaced with contents from a lower priority buffer. If a desired address translation pair is not present in any buffer, the contents of the lowest priority buffer are replaced.
    Type: Grant
    Filed: December 16, 1988
    Date of Patent: December 25, 1990
    Assignee: NEC Corporation
    Inventors: Hajime Fukuzawa, Kozo Yamano, Yasuyuki Iwata, Fumihiko Miyazawa