Patents by Inventor Yasuzi Nagayama

Yasuzi Nagayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4255756
    Abstract: The disposed substrate bias generator comprises a capacitor including an electrically insulating film sandwiched between two electrodes one of which is disposed on one main face of a p.sup.- semiconductor substrate through another electrically insulating film, and a first, a second and a third N.sup.+ semiconductor region disposed in spaced relationship on the same main face. The first and second regions form a grounded source and a drain of an MOSFET connected to both its gate and one of the electrodes of the capacitor. The second and third regions form a source and a drain of another MOSFET connected to both its gate and the other main face of the substrate. A signal is applied to the other electrode of the capacitor.
    Type: Grant
    Filed: January 3, 1980
    Date of Patent: March 10, 1981
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kazuhiro Shimotori, Takao Nakano, Yasuzi Nagayama