Abstract: A method of forming an ultra-thin gate dielectric by soft nitrogen-containing plasma. The method comprises a pre-nitridation step nitrifying a substrate surface by soft nitrogen-containing plasma, and a thermal oxidation step oxidizing the substrate surface to form an ultra-thin gate dielectric on the substrate surface. The plasma density of the soft nitrogen-containing plasma is about 109-1013 cm−3.

Abstract: A method of manufacturing a semiconductor memory device with a gate dielectric stack is provided. A first insulating layer is formed on a semiconductor substrate with a first conductive type. A first conductive layer is formed on the first insulating layer. A second insulating layer with a stack of silicon dioxide/silicon nitride/silicon oxynitride/silicon dioxide is formed on the first conductive layer. A second conductive layer is formed on the second insulating layer. Patterning the first insulating layer, the first conductive layer, the second insulating layer and the second conductive layer to form a first gate dielectric layer, a floating gate, a second gate dielectric layer and a control gate. A source/drain with a second conductive type beside the floating gate is formed in the semiconductor substrate.

Abstract: A method for forming a gate dielectric layer by a single wafer process is provided. The method for forming a gate dielectric layer by a single wafer process is accomplished by two steps respectively performed in a single-wafer chamber and a single-wafer rapid thermal processing (RTP) chamber. First, by placing a silicon wafer in the single-wafer chamber and performing an oxynitridation process to form a nitrogen-contained silicon oxide layer on the surface of the silicon wafer. Then, placing the silicon wafer in the single-wafer RTP chamber and performing an in-situ steam generation (ISSG) rapid thermal oxidation process to oxidize the nitrogen-contained silicon oxide layer to a composite layer formed of an upper silicon oxynitride layer and a lower silicon oxide layer serving for a gate dielectric layer.

Abstract: A method for forming a gate dielectric layer by a single wafer process is provided. The method for forming a gate dielectric layer by a single wafer process is accomplished by two steps respectively performed in a single-wafer chamber and a single-wafer rapid thermal processing (RTP) chamber. First, by placing a silicon wafer in the single-wafer chamber and performing a nitridation process to form a nitrogen-contained silicon oxide layer on the surface of the silicon wafer. Then, placing the silicon wafer in the single-wafer RTP chamber and performing an in-situ steam generation (ISSG) oxidation process to oxidize the nitrogen-contained silicon oxide layer to a silicon oxide layer with an oxynitride bottom layer serving for a gate dielectric layer.

Abstract: A method for determining near-surface doping concentration is provided by utilizing surface photovoltage. A monochromatic light pulse is applied to a semiconductor substrate. When the energy of the incident light is larger than the energy gap of the semiconductor substrate, the light is absorbed by the substrate and thereby generates enough charge carriers. The carriers diffuse to the surface of the substrate and result in lowering the surface barrier, and hence, cause a shift of the surface voltage. The difference of the surface voltages, before and after the light pulse applied, is measured by using a surface photovoltage probe. Then, the doping concentration near the surface of the substrate can be determined according to the difference of the surface voltage.