Patents by Inventor Yaya Qi

Yaya Qi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11876102
    Abstract: The present disclosure provides a display substrate, a display panel and a display apparatus, belonging to the field of display technology. The display substrate includes a base, a plurality of common electrodes and a plurality of common electrode lines, the common electrodes are distributed on the base in an array, the common electrode lines extend along a row direction, and each common electrode line is connected to a corresponding row of common electrodes. The common electrode line is connected to the common electrode through a conductive connection portion, and the conductive connection portion includes conductive structures stacked on top of one another in a plurality of layers. The display substrate can reduce the resistance between the common electrode and the common electrode line, thereby reducing the voltage difference between the common electrodes in the display substrate and improving the uniformity of the common voltage therein.
    Type: Grant
    Filed: January 19, 2023
    Date of Patent: January 16, 2024
    Assignees: Beijing BOE Display Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xue Wang, Xiao Wang, Yan Yan, Tingting Wang, Yaya Qi, Xiaoying Li, Zhiqiang Ma
  • Publication number: 20240015939
    Abstract: The present disclosure provides a display substrate, including: a display area and a bonding area positioned on a side of the display area, the bonding area includes a plurality of bonding sub-areas arranged at intervals, the bonding sub-areas are arranged along a direction in which an edge of the display area extends and configured for bonding a chip-on-film, where a first antistatic layer is further arranged on the bonding area, at least a part of the first antistatic layer is positioned between adjacent ones of the bonding sub-areas, and the first antistatic layer is electrically coupled to a reference signal terminal. The present disclosure further provides a display device.
    Type: Application
    Filed: September 25, 2023
    Publication date: January 11, 2024
    Inventors: Yaya QI, Dianzheng DONG, Yan YAN, Xiao WANG, Xue WANG, Tingting WANG, Xiaoying LI, Zhiqiang MA
  • Patent number: 11805630
    Abstract: The present disclosure provides a display substrate, including: a display area and a bonding area positioned on a side of the display area, the bonding area includes a plurality of bonding sub-areas arranged at intervals, the bonding sub-areas are arranged along a direction in which an edge of the display area extends and configured for bonding a chip-on-film, where a first antistatic layer is further arranged on the bonding area, at least a part of the first antistatic layer is positioned between adjacent ones of the bonding sub-areas, and the first antistatic layer is electrically coupled to a reference signal terminal. The present disclosure further provides a display device.
    Type: Grant
    Filed: February 7, 2021
    Date of Patent: October 31, 2023
    Assignees: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yaya Qi, Dianzheng Dong, Yan Yan, Xiao Wang, Xue Wang, Tingting Wang, Xiaoying Li, Zhiqiang Ma
  • Publication number: 20230154935
    Abstract: The present disclosure provides a display substrate, a display panel and a display apparatus, belonging to the field of display technology. The display substrate includes a base, a plurality of common electrodes and a plurality of common electrode lines, the common electrodes are distributed on the base in an array, the common electrode lines extend along a row direction, and each common electrode line is connected to a corresponding row of common electrodes. The common electrode line is connected to the common electrode through a conductive connection portion, and the conductive connection portion includes conductive structures stacked on top of one another in a plurality of layers. The display substrate can reduce the resistance between the common electrode and the common electrode line, thereby reducing the voltage difference between the common electrodes in the display substrate and improving the uniformity of the common voltage therein.
    Type: Application
    Filed: January 19, 2023
    Publication date: May 18, 2023
    Inventors: Xue WANG, Xiao WANG, Yan YAN, Tingting WANG, Yaya QI, Xiaoying LI, Zhiqiang MA
  • Patent number: 11586088
    Abstract: The present disclosure provides a display substrate, a display panel and a display apparatus, belonging to the field of display technology. The display substrate includes a base, a plurality of common electrodes and a plurality of common electrode lines, the common electrodes are distributed on the base in an array, the common electrode lines extend along a row direction, and each common electrode line is connected to a corresponding row of common electrodes. The common electrode line is connected to the common electrode through a conductive connection portion, and the conductive connection portion includes conductive structures stacked on top of one another in a plurality of layers. The display substrate can reduce the resistance between the common electrode and the common electrode line, thereby reducing the voltage difference between the common electrodes in the display substrate and improving the uniformity of the common voltage therein.
    Type: Grant
    Filed: February 26, 2021
    Date of Patent: February 21, 2023
    Assignees: Beijing BOE Display Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xue Wang, Xiao Wang, Yan Yan, Tingting Wang, Yaya Qi, Xiaoying Li, Zhiqiang Ma
  • Publication number: 20220346291
    Abstract: The present disclosure provides a display substrate, including: a display area and a bonding area positioned on a side of the display area, the bonding area includes a plurality of bonding sub-areas arranged at intervals, the bonding sub-areas are arranged along a direction in which an edge of the display area extends and configured for bonding a chip-on-film, where a first antistatic layer is further arranged on the bonding area, at least a part of the first antistatic layer is positioned between adjacent ones of the bonding sub-areas, and the first antistatic layer is electrically coupled to a reference signal terminal. The present disclosure further provides a display device.
    Type: Application
    Filed: February 7, 2021
    Publication date: October 27, 2022
    Inventors: Yaya QI, Dianzheng DONG, Yan YAN, Xiao WANG, Xue WANG, Tingting WANG, Xiaoying LI, Zhiqiang MA
  • Publication number: 20220187666
    Abstract: The present disclosure provides a display substrate, a display panel and a display apparatus, belonging to the field of display technology. The display substrate includes a base, a plurality of common electrodes and a plurality of common electrode lines, the common electrodes are distributed on the base in an array, the common electrode lines extend along a row direction, and each common electrode line is connected to a corresponding row of common electrodes. The common electrode line is connected to the common electrode through a conductive connection portion, and the conductive connection portion includes conductive structures stacked on top of one another in a plurality of layers. The display substrate can reduce the resistance between the common electrode and the common electrode line, thereby reducing the voltage difference between the common electrodes in the display substrate and improving the uniformity of the common voltage therein.
    Type: Application
    Filed: February 26, 2021
    Publication date: June 16, 2022
    Inventors: Xue WANG, Xiao WANG, Yan YAN, Tingting WANG, Yaya QI, Xiaoying LI, Zhiqiang MA
  • Publication number: 20210151468
    Abstract: The present disclosure discloses an array substrate, a display panel and a display device. The array substrate comprises: a substrate, multiple signal lines arranged on a side of the substrate and extending along a first direction, and multiple lead terminals connected with the multiple signal lines respectively; wherein the multiple lead terminals each comprises: a bonding area configured to be bonded with a flexible printed circuit board, and a bending area located at a side of the bonding area facing away from a connected signal line, wherein the lead terminal is bent-shaped in the bending area.
    Type: Application
    Filed: March 23, 2020
    Publication date: May 20, 2021
    Inventors: Xiaoying LI, Yan Yan, Xue Wang, Tingting Wang, Yaya Qi, Xiao Wang, Zhiqiang Ma