Patents by Inventor Yee Leng Low
Yee Leng Low has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10338329Abstract: An optoelectronic device having three substantially planar substrates arranged such that one of the substrates is orthogonal to the other two substrates. In an example embodiment, the first substrate may have one or more photonic devices configured to emit or receive light traveling substantially orthogonally with respect to a major plane of the first substrate. The second substrate has an optical waveguide circuit thereon that is edge-coupled to receive (or transmit) the light from (to) the one or more photonic devices. The third substrate has an electrical circuit thereon and is connected to form an L-shaped junction with the first substrate, the L-shaped junction providing electrical connections between the corresponding electrical transmission lines located on the first and third substrates, e.g., to communicate electrical signals with the one or more photonic devices. In some embodiments, the optoelectronic device can be used to implement an optical transmitter or receiver.Type: GrantFiled: August 2, 2017Date of Patent: July 2, 2019Assignee: Nokia Solutions and Networks OyInventors: Yee Leng Low, Nagesh Basavanhally
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Publication number: 20190081706Abstract: The present disclosure is directed to an apparatus comprising two components mounted on opposite sides of a window but proximate to each other where the two components are communicatively coupled through an optical link and where each component can be communicatively coupled with a wireless data source. In another embodiment, the components can include one or more of light indicators, audio indicators, and magnetic assistance to guide an optical alignment between the two components. In another embodiment, the components can include one or more of an array of lasers, larger photo diodes, adjustable lenses, and can utilize gain parameters to increase the tolerance level for a misaligned optical link. In another embodiment, methods are disclosed to perform communication coupling via an optical transmission link. In another embodiment, methods are disclosed to assist a user in optically aligning the two components.Type: ApplicationFiled: January 17, 2018Publication date: March 14, 2019Inventors: David Neilson, Michael Zierdt, Yee Leng Low, Nagesh Basavanhally
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Publication number: 20190041591Abstract: An optoelectronic device having three substantially planar substrates arranged such that one of the substrates is orthogonal to the other two substrates. In an example embodiment, the first substrate may have one or more photonic devices configured to emit or receive light traveling substantially orthogonally with respect to a major plane of the first substrate. The second substrate has an optical waveguide circuit thereon that is edge-coupled to receive (or transmit) the light from (to) the one or more photonic devices. The third substrate has an electrical circuit thereon and is connected to form an L-shaped junction with the first substrate, the L-shaped junction providing electrical connections between the corresponding electrical transmission lines located on the first and third substrates, e.g., to communicate electrical signals with the one or more photonic devices. In some embodiments, the optoelectronic device can be used to implement an optical transmitter or receiver.Type: ApplicationFiled: August 2, 2017Publication date: February 7, 2019Applicant: Nokia Solutions and Networks OyInventors: Yee Leng Low, Nagesh Basavanhally
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Patent number: 7217922Abstract: A micro-miniature ion trap device comprises a wafer (or substrate) having a major surface, a multiplicity of electrodes forming a micro-miniature ion trap in a region adjacent the major surface when voltage is applied to the electrodes, characterized in that the multiplicity includes a first, planar annular electrode located over and rigidly affixed to the major surface, and at least one second, planar annular electrode located over and rigidly affixed to the major surface, the at least one second electrode being concentric with the first electrode. The at least one second electrode may be completely annular, in that the annulus forms a closed geometric shape, or it may be partially annular, in that the annulus has a slot or opening allowing access to the first electrode. In accordance with a preferred embodiment of our invention, the at least one second electrode is C-shaped, and the angle subtended by the C-shape is greater than 180 degrees.Type: GrantFiled: March 14, 2005Date of Patent: May 15, 2007Assignee: Lucent Technologies Inc.Inventors: Matthew Douglas Apau Jachowski, Yee Leng Low, Stanley Pau
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Patent number: 6603182Abstract: The specification describes a packaging arrangement for micro-electromechanical systems (MEMS). The MEMS devices are mounted on a ceramic platform and are then packaged in a hybrid package. The hybrid package may be hermetically sealed. The hybrid package uses a ceramic insert as the primary MEMS device enclosure. The ceramic insert is mounted on a polymer printed wiring board, which provides both support and electrical interconnection for the ceramic insert. Optical access to the MEMS device is through a transparent window that may be hermetically sealed to the ceramic insert. The use of a ceramic primary enclosure for the MEMS device array substantially eliminates thermomechanical instabilities and provides thermomechanical and hermetic performance for the elements that require it. The main interconnection and routing function, implemented using standard epoxy printed circuit technology, yields high interconnection versatility and performance at low cost.Type: GrantFiled: March 12, 2002Date of Patent: August 5, 2003Assignee: Lucent Technologies Inc.Inventors: Yee Leng Low, David Andrew Ramsey
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Patent number: 6370766Abstract: The specification describes methods for the manufacture of printed circuit cards which allow for final testing, including burn-in if required, of multiples of printed circuit cards as an integrated process panel prior to final packaging and singulation. This desired sequence of operations is made possible by the addition of arrays of test contacts at the edge of the integrated process panel where the test contacts can be accessed with an insertion test apparatus.Type: GrantFiled: February 28, 1997Date of Patent: April 16, 2002Assignee: Lucent Technologies Inc.Inventors: Yinon Degani, Thomas Dixon Dudderar, Dean Paul Kossives, Yee Leng Low
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Patent number: 6313719Abstract: A bandpass planar filter (110) comprises a signal input and a signal output (116), and one or more resonator elements (112, 114) coupled serially end-to-end between the input and the output across gaps (118) that separate the elements from the input, the output, and from each other. The resonator elements form a serpentine shape such that at least two portions of the serpentine shape are positioned side-by-side parallel to each other separated by a spacing (120). The side-by-side portions effect additional coupling between the resonator elements that forms a notch (transmission zero) (204) in the passband (200) of the filter. The input, output, and resonator elements are etched into one surface (106) of a PC board (102); the other surface (104) of the PC board forms a ground plane of the filter, and the substrate (103) of the PC board forms a dielectric of the filter.Type: GrantFiled: March 9, 2000Date of Patent: November 6, 2001Assignee: Avaya Technology Corp.Inventors: Ron Barnett, Yee Leng Low, Zhengxiang Ma, King L Tai, Hui Wu
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Patent number: 6297551Abstract: The specification describes a recessed chip MCM package with integrated electromagnetic shielding. The surfaces of the cavity which houses the IC devices are coated with metallization. The normally exposed top and side surfaces of the MCM package are also metallized. A solder wall is provided on the interconnect PCB which seals the gap between the MCM tile and the PCB interconnect substrate. The solder wall can be formed using standard solder bump technology, and the seal between the MCM and the PCB may be made during the same reflow operation that is used to flip-chip bond the MCM tile to the PCB.Type: GrantFiled: September 22, 1999Date of Patent: October 2, 2001Assignee: Agere Systems Guardian Corp.Inventors: Thomas Dixon Dudderar, Dean Paul Kossives, Yee Leng Low
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Patent number: 6232047Abstract: The specification describes method for improving the edge acuity of conductive metal strips formed by thick film paste techniques. The advantages of the bulk properties of strips formed using thick film technology are realized while the drawback of poor edge definition is overcome using a thin film trim strip at the edge of the conductive strip.Type: GrantFiled: March 2, 1999Date of Patent: May 15, 2001Assignee: Agere Systems Inc.Inventors: Robert Charles Frye, Yee Leng Low, King Lien Tai
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Patent number: 6154370Abstract: The specification describes a recessed chip IC package in which the cavity in the printed wiring board into which the IC chip is recessed is used as a through hole interconnection, thus increasing the interconnection density. If the through cavity interconnections are used as power and ground the signal I/O pads and the signal runners are effectively isolated.Type: GrantFiled: July 21, 1998Date of Patent: November 28, 2000Assignee: Lucent Technologies Inc.Inventors: Yinon Degani, Robert Charles Frye, Yee Leng Low
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Patent number: 5898223Abstract: The specification describes interconnection layouts for chip-on-chip packages using solder bump interchip connections as vias between a single level metal interconnection pattern on the lower support IC chip and another single level interconnection pattern on the upper IC chip. This arrangement allows for the formation of air isolated crossovers of features on either chip.Type: GrantFiled: October 8, 1997Date of Patent: April 27, 1999Assignee: Lucent Technologies Inc.Inventors: Robert Charles Frye, Yee Leng Low, Kevin John O'Connor