Abstract: Various presence detection techniques are disclosed. In some embodiments, a system comprises a signal generator configured to generate a signal that includes a plurality of selected frequencies that are selected from among a set of candidate frequencies, wherein inclusion or exclusion of each candidate frequency in the signal encodes a bit of information and wherein the encoded information comprises a store identifier that identifies a retail store; and a transmitter configured to transmit the signal within the retail store; wherein presence of a device in the retail store is determined in response to reception of the signal at the device and extraction of the store identifier from the received signal by decoding the received signal.

Abstract: Various presence detection techniques are disclosed. In some embodiments, a system comprises a signal generator configured to generate a signal that includes a plurality of selected frequencies that are selected from among a set of candidate frequencies, wherein inclusion or exclusion of each candidate frequency in the signal encodes a bit of information and wherein the encoded information comprises a store identifier that identifies a retail store; and a transmitter configured to transmit the signal within the retail store; wherein presence of a device in the retail store is determined in response to reception of the signal at the device and extraction of the store identifier from the received signal by decoding the received signal.

Abstract: The transmission system transmits an encrypted identifier ultrasonically in an open-air environment using an ultrasonic transmitter. The ultrasonic identifier is associated with a location, which may be a store or a department within a store, and may be received by a microphone on a mobile phone. The identifier may be used to infer presence of the mobile phone user at the location associated with the identifier. The transmitter may include an ultrasonic transducer. The system may further provide a reward, responsive to inferring presence at the location.

Abstract: Custom operations are useable in processor systems for performing functions including multimedia functions. These custom operations enhance a system, such as PC system, to provide real-time multimedia capabilities while maintaining advantages of a special-purpose, embedded solution, i.e., low cost and chip count, and advantages of a general-purpose processor reprogramability. These custom operations work in a computer system which supplies input data having at least two operand data, performs operations on the operand data, and supplies result data to a destination register.

Abstract: Custom operations are useable in processor systems for performing functions including multimedia functions. These custom operations enhance a system, such as PC system, to provide real-time multimedia capabilities while maintaining advantages of a special-purpose, embedded solution, i.e., low cost and chip count, and advantages of a general-purpose processor reprogramability. These custom operations work in a computer system which supplies input data having operand data, performs operations on the operand data, and supplies result data to a destination register. Operations performed may include audio and video processing including clipping or saturation operations. The present invention also performs parallel operations on select operand data from input registers and stores results in the destination register.

Abstract: Software creates a compressed instruction format for a VLIW processor which allows greater efficiency in use of cache and memory. Instructions are byte aligned and variable length. Branch targets are uncompressed. Format bits specify how many issue slots are used in a following instruction. NOPS are not stored in memory. Individual operations are compressed according to features such as whether they are resultless, guarded, short, zeroary, unary, or binary. Instructions are stored in compressed form in memory and in cache. Instructions are decompressed on the fly after being read out from cache.

Abstract: The software which produces a shuffled bit stream which bit stream allows for a simplified cache layout. This object is met using computer software which includes code for receiving a compiled and linked object module produced by a compiler and/or linker and code for swizzling the compiled and linked software to produce a second object module. The second object module is suitable for being deswizzled upon reading from a cache memory using a cache structure whose output bus wires are not crossed.

Abstract: Software creates a compressed instruction format for a VLIW processor which allows greater efficiency in use of cache and memory. Instructions are byte aligned and variable length. Branch targets are uncompressed. Format bits specify how many issue slots are used in a following instruction. NOPS are not stored in memory. Individual operations are compressed according to features such as whether they are resultless, guarded, short, zeroary, unary, or binary. Instructions are stored in compressed form in memory and in cache. Instructions are decompressed on the fly after being read out from cache.

Abstract: A disposable container for forming the end wall of the open end of a barrel of a syringe and for being retained thereon by the resilient interaction of a surface of the barrel and the resilient periphery of a circumferential flange at the intersection of a substantially rigid first wall portion and a flexible second wall portion of the container. Preferably the resilient periphery flexes when pressed into the barrel and then springs out to engage an annular channel-like area in the barrel.