Patents by Inventor Yen-Chang HSIEH

Yen-Chang HSIEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240165181
    Abstract: A composition for inhibiting intestinal permeability, treating leaky gut related diseases and/or preventing leaky gut related diseases including a Chinese herbal compound material or a Chinese herbal compound extract is provided. The Chinese herbal compound material includes Ganoderma, red jujube, longan and lotus seed. Moreover, the Chinese herbal compound extract includes a Ganoderma extract, a red jujube extract, a longan extract and a lotus seed extract.
    Type: Application
    Filed: June 1, 2023
    Publication date: May 23, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: I-Hong PAN, Kuei-Chang LI, Zong-Keng KUO, Chu-Hsun LU, Yen-Wu HSIEH, Shu-Fang WEN
  • Patent number: 9130103
    Abstract: The present invention is directed to a light-emitting diode (LED) device, which includes at least one LED unit. Each LED unit includes at least one LED, which includes a first doped layer, a second doped layer and a conductive defect layer. The conductive defect layer is formed on the first or second doped layer. The conductive defect layer may be deposited between two LEDs, or between the first/second doped layer and an electrode.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: September 8, 2015
    Assignee: PHOSTEK, INC.
    Inventor: Yen-Chang Hsieh
  • Patent number: 8980728
    Abstract: A method of manufacturing a semiconductor apparatus is disclosed. A first-type doped layer, a second-type doped layer, and an internal electrical connection layer are formed. The internal electrical connection layer is deposited and electrically coupled between the first-type doped layer and the second-type doped layer. In one embodiment, the internal electrical connection layer is formed by using a group IV based precursor and nitrogen based precursor. In another embodiment, the internal electrical connection layer is formed by a mixture comprising a carbon-contained doping source, and the internal electrical connection layer has a carbon concentration greater than 1017 atoms/cm3. In a further embodiment, the internal electrical connection layer is formed at a temperature lower than those of the first-type doped layer and the second-type doped layer.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: March 17, 2015
    Assignee: Phostek, Inc.
    Inventors: Yen-Chang Hsieh, Jinn Kong Sheu, Heng Liu, Chun-Chao Li, Ya-Hsuan Shih, Chia-Nan Chen
  • Patent number: 8963297
    Abstract: A semiconductor apparatus includes a p-type doped layer, an n-type doped layer, and an internal electrical connection layer that is deposited and electrically coupled between the p-type doped layer and the n-type doped layer. In one embodiment, the internal electrical connection layer includes a group IV element and a nitrogen element, and the number of atoms of the group IV element and the nitrogen element is greater than 50% of the total number of atoms in the internal electrical connection layer. In another embodiment, the internal electrical connection layer includes carbon element with a concentration greater than 1017 atoms/cm3. In a further embodiment, the internal electrical connection layer is formed at a temperature lower than those of the p-type doped layer and the n-type doped layer.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: February 24, 2015
    Assignee: Phostek, Inc.
    Inventors: Yen-Chang Hsieh, Jinn Kong Sheu, Heng Liu, Chun-Chao Li, Ya-Hsuan Shih, Chia-Nan Chen
  • Publication number: 20130228740
    Abstract: A light-emitting diode (LED) device includes at least one LED unit. Each LED unit includes at least one LED. Each LED includes an n-side nitride semiconductor layer, a p-side nitride semiconductor layer, and an active layer that is located between the n-side nitride semiconductor layer and the p-side nitride semiconductor layer. The active layer is includes one or more well layers. At least one of the well layers has a multilayered structure.
    Type: Application
    Filed: April 25, 2012
    Publication date: September 5, 2013
    Applicant: PHOSTEK, INC.
    Inventors: Yen-Chang HSIEH, Ya-Hsuan SHIH