Patents by Inventor Yen Lu

Yen Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11983045
    Abstract: An electronic device includes two bodies, at least one hinge structure, a functional assembly, and at least one linkage structure. The two bodies are pivotally connected to each other through the hinge structure. The functional assembly is movably disposed on one of the two bodies. The linkage structure is connected between the two bodies, and the functional assembly is connected to the linkage structure. The linkage structure is adapted to drive the functional assembly to move relative to the corresponding body as the two bodies are rotated relative to each other.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: May 14, 2024
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Che-Hsien Lin, Che-Hsien Chu, Ko-Yen Lu
  • Patent number: 11984649
    Abstract: A wearable device includes a conducting frame, a circuit board, and a grounding member. The conducting frame includes a first part and a second part that are separated. The circuit board has a system grounding surface and is disposed inside the conducting frame. The grounding member is disposed inside the conducting frame and connected to the first part. The first part and the grounding member are formed as a first antenna. The first part has a first feeding terminal. The grounding member has a first grounding terminal, and the first grounding terminal is connected to the system grounding surface of the circuit board. The second part is formed as a second antenna. The second antenna has a second feeding terminal, a second grounding terminal, and a third grounding terminal. The second and the third grounding terminals are connected to the system grounding surface of the circuit board.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: May 14, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Kuo-Chi Cheng, Po-Yen Lai, Ping-Hung Lu
  • Publication number: 20240153843
    Abstract: A package structure is provided. The package structure includes a semiconductor die and a thermoelectric structure disposed on the semiconductor die. The thermoelectric structure includes P-type semiconductor blocks, N-type semiconductor blocks and metal pads. The P-type semiconductor blocks and the N-type semiconductor blocks are arranged in alternation with the metal pads connecting the P-type semiconductor blocks and the N-type semiconductor blocks. When a current flowing through one of the N-type semiconductor block, one of the metal pad, and one of the P-type semiconductor block in order, the metal pad between the N-type semiconductor block and the P-type semiconductor block forms a cold junction which absorbs heat generated by the semiconductor die.
    Type: Application
    Filed: January 17, 2024
    Publication date: May 9, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Yen Hsieh, Chih-Horng Chang, Chung-Yu Lu
  • Publication number: 20240145249
    Abstract: A device includes first and second gate structures respectively extending across the first and second fins, and a gate isolation plug between a longitudinal end of the first gate structure and a longitudinal end of the second gate structure. The gate isolation plug comprises a first dielectric layer and a second dielectric layer over the first dielectric layer. The first dielectric layer has an upper portion and a lower portion below the upper portion. The upper portion has a thickness smaller than a thickness of the lower portion of the first dielectric layer.
    Type: Application
    Filed: March 24, 2023
    Publication date: May 2, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ting-Gang CHEN, Wan Chen HSIEH, Bo-Cyuan LU, Tai-Jung KUO, Kuo-Shuo HUANG, Chi-Yen TUNG, Tai-Chun HUANG
  • Publication number: 20240145381
    Abstract: In some embodiments, the present disclosure relates an integrated chip including a substrate. A conductive interconnect feature is arranged over the substrate. The conductive interconnect feature has a base feature portion with a base feature width and an upper feature portion with an upper feature width. The upper feature width is narrower than the base feature width such that the conductive interconnect feature has tapered outer feature sidewalls. An interconnect via is arranged over the conductive interconnect feature. The interconnect via has a base via portion with a base via width and an upper via portion with an upper via width. The upper via width is wider than the base via width such that the interconnect via has tapered outer via sidewalls.
    Type: Application
    Filed: January 9, 2024
    Publication date: May 2, 2024
    Inventors: Shin-Yi Yang, Hsin-Yen Huang, Ming-Han Lee, Shau-Lin Shue, Yu-Chen Chan, Meng-Pei Lu
  • Publication number: 20240142833
    Abstract: An electronic device includes a substrate, a driving element, a first insulating layer, a pixel electrode layer, and a common electrode layer. The driving element is disposed on the substrate. The first insulating layer is disposed on the driving element. The pixel electrode layer is disposed on the first insulating layer. The first insulating layer comprises a hole, and the pixel electrode layer is electrically connected to the driving element through the hole. The common electrode layer is disposed on the pixel electrode layer. The common electrode layer comprises a slit, and the slit has an edge, and the edge is disposed in the hole.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 2, 2024
    Applicant: Innolux Corporation
    Inventors: Wei-Yen Chiu, Ming-Jou Tai, You-Cheng Lu, Yi-Shiuan Cherng, Yi-Hsiu Wu, Chia-Hao Tsai, Yung-Hsun Wu
  • Publication number: 20240137768
    Abstract: An automatic dynamic secure connection system and a method thereof, the automatic dynamic secure connection method comprises following steps: at least one user equipment executing a software program to generate at least one execution information; a central processing unit of an equipment information judging device receiving the execution information and capturing an abnormal information in the execution information; the central processing unit comparing and judging the abnormal information with a whitelist database, a malicious behavior feature database and a blacklist database, and integrating with an artificial intelligence model analysis result, and then generating a judgment result according to a set condition; and the central processing unit determining whether to adjust a connection behavior according to the judgment result, thereby, the automatic dynamic secure connection system is capable of judging a software execution status to adjust the connection behavior in order to achieve an efficacy of avoidi
    Type: Application
    Filed: October 20, 2022
    Publication date: April 25, 2024
    Inventor: CHIA-YEN LU
  • Patent number: 11966085
    Abstract: An optical transceiver includes an input assembly, an output port, a fiber patch panel, multiple first optical fibers and multiple second optical fibers. The input assembly is arranged on a circuit board and has a first input port and a second input port. The fiber patch panel is arranged between the input assembly and the output port, and has multiple first fiber patch slots and multiple second fiber patch slots. The first optical fibers are connected to the first input port and the output port. The first optical fiber passes through the first fiber patch slot and the second fiber patch slot. The second optical fibers are connected to the second input port and the output port. The second optical fiber passes through the first fiber patch slot and the second fiber patch slot. The second fiber patch slot accommodates the first optical fiber and the second optical fiber.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: April 23, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chen-Mao Lu, Wei-Chan Hsu, Chun-Yen Chen
  • Publication number: 20240092662
    Abstract: A method for removing a heavy metal from water includes subjecting a microbial solution containing a liquid culture of a urease-producing bacterial strain and a reaction solution containing a manganese compound and urea to a microbial-induced precipitation reaction, so as to obtain biomineralized manganese carbonate (MnCO3) particles, admixing the biomineralized MnCO3 particles with water containing a heavy metal, so that the biomineralized MnCO3 particles adsorb the heavy metal in the water to form a precipitate, and removing the precipitate from the water.
    Type: Application
    Filed: February 9, 2023
    Publication date: March 21, 2024
    Inventors: Chien-Yen CHEN, Yi-Hsun HUANG, Pin-Yun LIN, Anggraeni Kumala DEWI, Koyeli DAS, Uttara SUKUL, Tsung-Hsien CHEN, Raju Kumar SHARMA, Cheng-Kang LU, Chung-Ming LU
  • Patent number: 11935890
    Abstract: In a method for forming an integrated semiconductor device, a first inter-layer dielectric (ILD) layer is formed over a semiconductor device that includes a first transistor structure, a two-dimensional (2D) material layer is formed over and in contact with the first ILD layer, the 2D material layer is patterned to form a channel layer of a second transistor structure, a source electrode and a drain electrode of the second transistor structure are formed over the patterned 2D material layer and laterally spaced apart from each other, a gate dielectric layer of the second transistor structure is formed over the patterned 2D material layer, the source electrode and the drain electrode, and a gate electrode of the second transistor structure is formed over the gate dielectric layer and laterally between the source electrode and the drain electrode.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Yi Peng, Chun-Chieh Lu, Meng-Hsuan Hsiao, Ling-Yen Yeh, Carlos H. Diaz, Tung-Ying Lee
  • Patent number: 11926909
    Abstract: To provide a gas-liquid separator of a water electrolysis system, comprising: a liquid feeding atomizer and a gas-liquid separation chamber, wherein the liquid feeding atomizer includes a liquid feeding pressurized tube; and an atomizing spray head, in which the atomizing spray head converts a gas-liquid mixed liquor after pressurized by the liquid feeding pressurized tube into a mist droplet gas-liquid mixture. The gas-liquid separation chamber comprises a spiral flowing way, and the spiral flowing way extends the time that the mist droplet gas-liquid mixture spraying into the gas-liquid separation chamber flows downwards to the bottom of the gas-liquid separation chamber; an ultrasonic oscillation mechanism; a stirrer; an internal reservoir; and a filter mechanism, which performs the gas-liquid separation for unbroken bubbles in the mist droplet gas-liquid mixture through the pore difference.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: March 12, 2024
    Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Chia-Kan Hao, Kuan-Ting Lai, Chung-Yen Lu
  • Patent number: 11915994
    Abstract: A package structure is provided. The package structure includes a semiconductor die and a thermoelectric structure disposed on the semiconductor die. The thermoelectric structure includes P-type semiconductor blocks, N-type semiconductor blocks and metal pads. The P-type semiconductor blocks and the N-type semiconductor blocks are arranged in alternation with the metal pads connecting the P-type semiconductor blocks and the N-type semiconductor blocks. When a current flowing through one of the N-type semiconductor block, one of the metal pad, and one of the P-type semiconductor block in order, the metal pad between the N-type semiconductor block and the P-type semiconductor block forms a cold junction which absorbs heat generated by the semiconductor die.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Yen Hsieh, Chih-Horng Chang, Chung-Yu Lu
  • Patent number: 11888170
    Abstract: A clamping member and a battery accommodating device are provided. The battery accommodating device includes a body and a clamping member pivotally connected to the body. The clamping member has two arm parts, two protruding parts respectively extending from one side of the two arm parts, and an elastic structure connected to the two arm parts at two ends. When the battery is placed in an accommodating slot of the body, the elastic structure is pressed by the battery, and one end of the battery is clamped between the two protruding parts and the elastic structure. When the two protruding parts are pushed by an external force, the clamping member rotates relative to the body, and the elastic structure pushes up the battery, so as to release the clamped end of the battery.
    Type: Grant
    Filed: October 8, 2021
    Date of Patent: January 30, 2024
    Assignee: WISTRON NEWEB CORPORATION
    Inventors: Yan-Da Chen, Ying-Yen Lu
  • Patent number: 11875473
    Abstract: An image processing method for receiving M lens images and generating a projection image is disclosed. The method comprises: determining P optimal warping coefficients of P control regions in the projection image according to a 2D error table and the M lens images from an image capture module; generating M projection images according to the M lens images, a first vertex list and the P optimal warping coefficients; determining a seam for each of N seam regions; and, stitching two overlapping seam images to generate a stitched seam image for each seam region according to its corresponding seam. The 2D error table comprises multiple test warping coefficients and multiple accumulation pixel value differences in the P control regions. The P control regions are respectively located in the N seam regions respectively located in N overlap regions, where M>=2, N>=1 and P>=3.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: January 16, 2024
    Assignee: ASPEED TECHNOLOGY INC.
    Inventor: Chung-Yen Lu
  • Patent number: 11874708
    Abstract: An electronic device includes at least one hinge assembly and two bodies. The hinge assembly includes a main body and two shafts. One end of each of the shafts is pivotally connected to the main body, another end of each of the shafts has an embedded portion, and the embedded portion has a roughened structure thereon. The two bodies correspond to the two shafts respectively, each of the bodies has at least one depression, and the embedded portion of each of the shafts is embedded in the depression of the corresponding body and contacts an inner wall of the depression through the roughened structure.
    Type: Grant
    Filed: October 12, 2020
    Date of Patent: January 16, 2024
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Che-Hsien Lin, Ko-Yen Lu
  • Patent number: 11850823
    Abstract: An electronic device is provided. The electronic device includes a display, a substrate, and an anti-explosion layer. The substrate is disposed on the display. The anti-explosion layer is disposed between the substrate and the display, and the anti-explosion layer has a tensile strength in a range from 10 MPa to 30 MPa.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: December 26, 2023
    Assignee: INNOLUX CORPORATION
    Inventors: Chao-Li Chuang, Hsin-Wei Huang, Ming-Chi Guo, Chih-Yen Lu, Kuan-Chou Chen
  • Publication number: 20230394622
    Abstract: An image processing system is disclosed, comprising a multiple-lens camera, a vertex list generator and an image processing apparatus. The multiple-lens camera captures a X-degree horizontal field of view (FOV) and a Y-degree vertical FOV to generate multiple lens images, where X<=360, Y<=180. The vertex list generator generates a first main vertex list according to a correspondence table, and generates a first region of interest (ROI) vertex list according to the first main vertex list and a position information of the ROI when the ROI overlaps at least one measuring region inside an overlap region in a projection image. The image processing apparatus generates the projection image according to the multiple lens images and a second main vertex list related to first main vertex list in a rendering mode.
    Type: Application
    Filed: June 6, 2022
    Publication date: December 7, 2023
    Inventor: CHUNG-YEN LU
  • Patent number: 11822415
    Abstract: In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may: determine a difference between a first voltage value associated with an electrical power output of a power system of an information handling system (IHS) and a second voltage value associated with a battery system of the IHS is greater than a first voltage value threshold; turn a first switch on to conduct electrical power from the battery system to an electrical power output of the power system; set a voltage value associated with the electrical power output to a voltage value associated with the battery system; permit an amount of time to transpire; determine a difference between a third voltage value associated with the electrical power output and a fourth voltage value associated with the battery system is less than a second voltage value threshold; and turn the first switch off.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: November 21, 2023
    Inventors: Hao-Yu Chung, Chun-Yen Lu
  • Publication number: 20230354551
    Abstract: A server stand with an inbuilt leakproof connecting device for coolant flow includes a frame body and a manifold. The frame body and the manifold are fixed together, the manifold has a connecting end. The server stand further includes first positioning structure and mounting assembly. The first positioning structure connects with the manifold, and the first positioning structure is near the connecting end. A bracket with blocking portion and a second positioning structure are also included, the second positioning structure can slide into connection with the first positioning structure, and the second and first positioning structures function to pre-position the bracket, the bracket being fixedly connected with the frame body. The server assembly includes a server host and an operating lever, the server host is movably connected with the operating lever.
    Type: Application
    Filed: November 3, 2022
    Publication date: November 2, 2023
    Inventors: YEN-LU CHENG, HAO-WEN CHENG
  • Patent number: D1027936
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: May 21, 2024
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Che-Hsien Lin, Ko-Yen Lu