Patents by Inventor Yen-Wen Chen
Yen-Wen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11993025Abstract: A fixing assembly for mounting UV lamps includes a base, a first gear and a plurality of mounting modules. The first gear is arranged on one side of the base; the mounting modules are arranged around the first gear. The mounting module includes a first driving assembly, a second driving assembly and a support frame. The first driving assembly is used to drive the second driving assembly and the support frame to move circumferentially around the first gear in a considerably horizontal plane, and the second driving component is used to drive the support to move back in a considerably vertical direction. The support frame is used for mounting UV lamp. The flexibility of the fixing assembly is improved. The UV lamp may comprehensively irradiate and cure the photosensitive adhesive.Type: GrantFiled: June 28, 2022Date of Patent: May 28, 2024Assignee: TRIPLE WIN TECHNOLOGY(SHENZHEN) CO.LTD.Inventors: Yen-Sheng Lin, Yu-Wen Chen
-
Publication number: 20240165170Abstract: The present invention provides a method for preventing and/or treating a NSAID-induced gastric ulcer. The method comprises administrating an effective amount of a lactic acid bacterium set to a subject. The lactic acid bacterium set comprises Lactobacillus plantarum GKD7 and Pediococcus acidilactici GKA4.Type: ApplicationFiled: March 6, 2023Publication date: May 23, 2024Applicant: GRAPE KING BIO LTD.Inventors: Chin-Chu CHEN, Yen-Lien CHEN, Shin-Wei LIN, You-Shan TSAI, Ci-Sian WANG, Yu-Hsin HOU, Yang-Tzu SHIH, Ching-Wen LIN, Ya-Jyun CHEN, Jia-Lin JIANG, Zi-He WU, Yen-Po CHEN, Tzu Chun LIN
-
Patent number: 11980694Abstract: A sterilization apparatus for a portable electronic device including a cabinet and a carrier is provided. The carrier includes a base slidably disposed on the cabinet, multiple first positioning elements and multiple second positioning elements disposed in parallel on the base, multiple sterilization light sources corresponding to the second positioning elements and multiple pressure sensors disposed in parallel in the base. The base is configured to carry at least one portable electronic device. One second positioning element is disposed between any two adjacent first positioning elements, and any first positioning element and any second positioning element adjacent to each other are separated by a positioning space. The pressure sensors are respectively located in the positioning spaces. One sterilization light source is disposed between any two adjacent pressure sensors, and the pressure sensors are configured to sense a pressure from the portable electronic device.Type: GrantFiled: May 13, 2021Date of Patent: May 14, 2024Assignee: COMPAL ELECTRONICS, INC.Inventors: Yi-Hung Chen, Chih-Wen Chiang, Yun-Tung Pai, Yen-Hua Hsiao, Yao-Kuang Su, Yi-Hsuan Lin, Han-Sheng Siao
-
Integration scheme for breakdown voltage enhancement of a piezoelectric metal-insulator-metal device
Patent number: 11984261Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a dielectric structure sandwiched between a first electrode and a bottom electrode. A passivation layer overlies the second electrode and the dielectric structure. The passivation layer comprises a horizontal surface vertically below a top surface of the passivation layer. The horizontal surface is disposed above a top surface of the dielectric structure.Type: GrantFiled: August 25, 2021Date of Patent: May 14, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Anderson Lin, Chun-Ren Cheng, Chi-Yuan Shih, Shih-Fen Huang, Yi-Chuan Teng, Yi Heng Tsai, You-Ru Lin, Yen-Wen Chen, Fu-Chun Huang, Fan Hu, Ching-Hui Lin, Yan-Jie Liao -
Publication number: 20240139262Abstract: The present disclosure relates to a complex probiotic composition and a method for improving exercise performance of a subject with low intrinsic aerobic exercise capacity. The complex probiotic composition, which includes Lactobacillus rhamnosus GKLC1, Bifidobacterium lactis GKK24 and Clostridium butyricum GKB7, administered to the subject with the low intrinsic aerobic exercise capacity in a continuation period, can effectively reduce serum lactic acid and serum urea nitrogen after aerobic exercise, reduce proportion of offal fat and/or increase liver and muscle glycogen contents, thereby being as an effective ingredient for preparation of various compositions.Type: ApplicationFiled: October 13, 2023Publication date: May 2, 2024Inventors: Chin-Chu CHEN, Yen-Lien CHEN, Shih-Wei LIN, Yen-Po CHEN, Ci-Sian WANG, Yu-Hsin HOU, Yang-Tzu SHIH, Ching-Wen LIN, Ya-Jyun CHEN, Jia-Lin JIANG, You-Shan TSAI, Zi-He WU
-
Patent number: 11968869Abstract: An electronic device includes a flexible substrate and a conductive wire. The conductive wire is disposed on the flexible substrate and includes a metal portion and a plurality of openings disposed in the metal portion. The metal portion includes a plurality of extending portions and a plurality of joint portions, and each of the openings is surrounded by two of the plurality of extending portions and two of the plurality of joint portions. A ratio of a sum of widths of the plurality of extending portions to a sum of widths of the plurality of joint portions is in a range from 0.8 to 1.2.Type: GrantFiled: April 28, 2022Date of Patent: April 23, 2024Assignee: InnoLux CorporationInventors: Ya-Wen Lin, Chien-Chih Chen, Yen-Hsi Tu, Cheng-Wei Chang, Shu-Hui Yang
-
Publication number: 20240088223Abstract: In a method of manufacturing a semiconductor device, a field effect transistor (FET) having a metal gate structure, a source and a drain over a substrate is formed. A first frontside contact disposed between dummy metal gate structures is formed over an isolation insulating layer. A frontside wiring layer is formed over the first frontside contact. A part of the substrate is removed from a backside of the substrate so that a bottom of the isolation insulating layer is exposed. A first opening is formed in the isolation insulating layer from the bottom of the isolation insulating layer to expose a bottom of the first frontside contact. A first backside contact is formed by filling the first opening with a conductive material to connect the first frontside contact.Type: ApplicationFiled: March 24, 2023Publication date: March 14, 2024Inventors: Shu-Wen SHEN, Yen-Po Lin, Chun-Han Chen
-
Patent number: 11914429Abstract: An electronic device includes a host, a display, a sliding plate, and a keyboard. The host has an operating surface. The display is pivoted to the host. The sliding plate is slidably disposed in the host, where the display is mechanically coupled to the sliding plate, and the sliding plate includes a plat portion and a recess portion that are arranged side by side. The keyboard is integrated to the host. The keyboard includes a key structure, where the key structure includes a key cap and a reciprocating element, and the key cap is exposed from the operating surface of the host. The reciprocating element is disposed between the key cap and the sliding plate and has a first end connected to the key cap and a second end contacting the sliding plate. The second end is located on a sliding path of the plat portion and the recess portion.Type: GrantFiled: March 9, 2023Date of Patent: February 27, 2024Assignee: Acer IncorporatedInventors: Hung-Chi Chen, Shun-Bin Chen, Huei-Ting Chuang, Yen-Chieh Chiu, Yu-Wen Lin, Yen-Chou Chueh, Po-Yi Lee
-
Publication number: 20220361978Abstract: An endoscope cleaning device is applied to an endoscope having a main body and a tube body connected to the main body. The endoscope cleaning device includes a frame, a receiving tank for receiving the tube body, a circulating module, and an operating module that is electrically connected to the circulating module. The receiving tank and the operating module are disposed on the frame. The circulating module is connected to a source of first solution supply, a source of second solution supply, and the receiving tank. The operating module is manipulated by a user to control the circulating module to transmit the solution provided by the source of first solution supply and the solution provided by the source of second solution supply to the receiving tank and then to drain the solution in the receiving tank out. A cleaning method of an endoscope by using the endoscope cleaning device is provided.Type: ApplicationFiled: May 11, 2021Publication date: November 17, 2022Applicant: ADRONIC ENDOSCOPE CO., LTD.Inventors: HSIANG-TE TSENG, YEN-WEN CHEN, SHIH-HONG HUANG
-
Patent number: 11289568Abstract: The present disclosure relates to a MIM (metal-insulator-metal) capacitor having a top electrode overlying a substrate. A passivation layer overlies the top electrode. The passivation layer has a step region that continuously contacts and extends from a top surface of the top electrode to sidewalls of the top electrode. A metal frame overlies the passivation layer. The metal frame continuously contacts and extends from a top surface of the passivation layer to upper sidewalls of the passivation layer in the step region. The metal frame has a protrusion that extends through the passivation layer and contacts the top surface of the top electrode.Type: GrantFiled: May 13, 2019Date of Patent: March 29, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chi-Yuan Shih, Kai-Fung Chang, Shih-Fen Huang, Wen-Chuan Tai, Yi-Chuan Teng, Yi Heng Tsai, You-Ru Lin, Yen-Wen Chen, Anderson Lin, Fu-Chun Huang, Chun-Ren Cheng, Ivan Hua-Shu Wu, Fan Hu, Ching-Hui Lin, Yan-Jie Liao
-
INTEGRATION SCHEME FOR BREAKDOWN VOLTAGE ENHANCEMENT OF A PIEZOELECTRIC METAL-INSULATOR-METAL DEVICE
Publication number: 20210383972Abstract: Various embodiments of the present disclosure are directed towards an integrated chip including a dielectric structure sandwiched between a first electrode and a bottom electrode. A passivation layer overlies the second electrode and the dielectric structure. The passivation layer comprises a horizontal surface vertically below a top surface of the passivation layer. The horizontal surface is disposed above a top surface of the dielectric structure.Type: ApplicationFiled: August 25, 2021Publication date: December 9, 2021Inventors: Anderson Lin, Chun-Ren Cheng, Chi-Yuan Shih, Shih-Fen Huang, Yi-Chuan Teng, Yi Heng Tsai, You-Ru Lin, Yen-Wen Chen, Fu-Chun Huang, Fan Hu, Ching-Hui Lin, Yan-Jie Liao -
Integration scheme for breakdown voltage enhancement of a piezoelectric metal-insulator-metal device
Patent number: 11107630Abstract: Various embodiments of the present disclosure are directed towards a piezoelectric metal-insulator-metal (MIM) device including a piezoelectric structure between a top electrode and a bottom electrode. The piezoelectric layer includes a top region overlying a bottom region. Outer sidewalls of the bottom region extend past outer sidewalls of the top region. The outer sidewalls of the top region are aligned with outer sidewalls of the top electrode. The piezoelectric layer is configured to help limit delamination of the top electrode from the piezoelectric layer.Type: GrantFiled: May 21, 2019Date of Patent: August 31, 2021Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Anderson Lin, Chun-Ren Cheng, Chi-Yuan Shih, Shih-Fen Huang, Yi-Chuan Teng, Yi Heng Tsai, You-Ru Lin, Yen-Wen Chen, Fu-Chun Huang, Fan Hu, Ching-Hui Lin, Yan-Jie Liao -
Patent number: 10693019Abstract: Various embodiments of the present application are directed towards a trench capacitor with a high capacitance density. In some embodiments, the trench capacitor overlies the substrate and fills a trench defined by the substrate. The trench capacitor comprises a lower capacitor electrode, a capacitor dielectric layer, and an upper capacitor electrode. The capacitor dielectric layer overlies the lower capacitor electrode and lines the trench. The upper capacitor electrode overlies the capacitor dielectric layer and lines the trench over the capacitor dielectric layer. The capacitor dielectric layer comprises a high ? dielectric material. By using a high ? material for the dielectric layer, the trench capacitor may have a high capacitance density suitable for use with high performance mobile devices.Type: GrantFiled: August 27, 2018Date of Patent: June 23, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hsin-Li Cheng, Jyun-Ying Lin, Jing-Hwang Yang, Ting-Chen Hsu, Felix Ying-Kit Tsui, Yen-Wen Chen
-
Publication number: 20200165083Abstract: The disclosure provides a transporting device, a transporting system, and a shelf transporting method. The method includes: estimating a device pose of the transporting device in a specific field; detecting a shelf pose of a shelf located in the specific field; in response to receiving a transporting request for the shelf, setting an entry point associated with the shelf based on the shelf pose of the shelf, and controlling the transporting device to move to the entry point; in response to determining that the transporting device has arrived at the entry point, rotating to align with the shelf, and entering an accommodating space beneath the shelf via an entrance of the shelf; raising a lift bar to dock with the shelf, and moving to transport the shelf.Type: ApplicationFiled: November 18, 2019Publication date: May 28, 2020Applicant: COMPAL ELECTRONICS, INC.Inventors: Chau-Lin Huang, Yen-Wen Chen, Chun-Ying Yu
-
Patent number: 10605769Abstract: A sensing device including a transistor, at least one response electrode, and a receptor is provided. The transistor includes a gate end, a source end, a drain end, and a semiconductor layer. The source end and the drain end are located on the semiconductor layer, and the gate end is located between the source end and the drain end. The at least one response electrode is disposed opposite to the gate end of the transistor and spaced apart from the transistor. The receptor is bonded onto the at least one response electrode. When a voltage is applied to the at least one response electrode, an electric field between the at least one response electrode and the gate end of the transistor is F, and F?1 mV/cm.Type: GrantFiled: January 8, 2018Date of Patent: March 31, 2020Assignee: National Tsing Hua UniversityInventors: Yu-Lin Wang, Yen-Wen Chen
-
Publication number: 20200098517Abstract: Various embodiments of the present disclosure are directed towards a piezoelectric metal-insulator-metal (MIM) device including a piezoelectric structure between a top electrode and a bottom electrode. The piezoelectric layer includes a top region overlying a bottom region. Outer sidewalls of the bottom region extend past outer sidewalls of the top region. The outer sidewalls of the top region are aligned with outer sidewalls of the top electrode. The piezoelectric layer is configured to help limit delamination of the top electrode from the piezoelectric layer.Type: ApplicationFiled: May 21, 2019Publication date: March 26, 2020Inventors: Anderson Lin, Chun-Ren Cheng, Chi-Yuan Shih, Shih-Fen Huang, Yi-Chuan Teng, Yi Heng Tsai, You-Ru Lin, Yen-Wen Chen, Fu-Chun Huang, Fan Hu, Ching-Hui Lin, Yan-Jie Liao
-
Publication number: 20200066922Abstract: Various embodiments of the present application are directed towards a trench capacitor with a high capacitance density. In some embodiments, the trench capacitor overlies the substrate and fills a trench defined by the substrate. The trench capacitor comprises a lower capacitor electrode, a capacitor dielectric layer, and an upper capacitor electrode. The capacitor dielectric layer overlies the lower capacitor electrode and lines the trench. The upper capacitor electrode overlies the capacitor dielectric layer and lines the trench over the capacitor dielectric layer. The capacitor dielectric layer comprises a high ? dielectric material. By using a high ? material for the dielectric layer, the trench capacitor may have a high capacitance density suitable for use with high performance mobile devices.Type: ApplicationFiled: August 27, 2018Publication date: February 27, 2020Inventors: Hsin-Li Cheng, Jyun-Ying Lin, Jing-Hwang Yang, Ting-Chen Hsu, Felix Ying-Kit Tsui, Yen-Wen Chen
-
Publication number: 20200006469Abstract: The present disclosure relates to a MIM (metal-insulator-metal) capacitor having a top electrode overlying a substrate. A passivation layer overlies the top electrode. The passivation layer has a step region that continuously contacts and extends from a top surface of the top electrode to sidewalls of the top electrode. A metal frame overlies the passivation layer. The metal frame continuously contacts and extends from a top surface of the passivation layer to upper sidewalls of the passivation layer in the step region. The metal frame has a protrusion that extends through the passivation layer and contacts the top surface of the top electrode.Type: ApplicationFiled: May 13, 2019Publication date: January 2, 2020Inventors: Chi-Yuan Shih, Kai-Fung Chang, Shih-Fen Huang, Wen-Chuan Tai, Yi-Chuan Teng, Yi Heng Tsai, You-Ru Lin, Yen-Wen Chen, Anderson Lin, Fu-Chun Huang, Chun-Ren Cheng, Ivan Hua-Shu Wu, Fan Hu, Ching-Hui Lin, Yan-Jie Liao
-
Publication number: 20190107507Abstract: A sensing device including a transistor, at least one response electrode, and a receptor is provided. The transistor includes a gate end, a source end, a drain end, and a semiconductor layer. The source end and the drain end are located on the semiconductor layer, and the gate end is located between the source end and the drain end. The at least one response electrode is disposed opposite to the gate end of the transistor and spaced apart from the transistor. The receptor is bonded onto the at least one response electrode. When a voltage is applied to the at least one response electrode, an electric field between the at least one response electrode and the gate end of the transistor is F, and F?1 mV/cm.Type: ApplicationFiled: January 8, 2018Publication date: April 11, 2019Applicant: National Tsing Hua UniversityInventors: Yu-Lin Wang, Yen-Wen Chen
-
Patent number: 9553243Abstract: This disclosure relates to a light-emitting apparatus comprising a submount, a chip carrier formed on the submount, a light-emitting chip formed on the chip carrier, a reflecting cup formed on the submount and enclosing the light-emitting chip and the chip carrier, and a transparent encapsulating material for encapsulating the light-emitting chip.Type: GrantFiled: April 7, 2014Date of Patent: January 24, 2017Assignee: EPISTAR CORPORATIONInventors: Min-Hsun Hsieh, Ta-Cheng Hsu, Meng-Lun Tsai, Chih-Chiang Lu, Chien-Yuan Wang, Yen-Wen Chen, Ya-Ju Lee