Patents by Inventor Yen-Yu Chen

Yen-Yu Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240111456
    Abstract: A method of a storage device controller includes: using an interface circuit for receiving and storing different write address information of different write command signals sent from a host device, the different write address information being out of sequence; and, using multiple processor cores to rearrange the different write address information in sequence and then write data into at least one storage zone according to the different write address information rearranged in sequence.
    Type: Application
    Filed: October 2, 2022
    Publication date: April 4, 2024
    Applicant: Silicon Motion, Inc.
    Inventors: Li-Chi Chen, Yen-Yu Jou
  • Patent number: 11944659
    Abstract: The invention provides a method for improving sarcopenia of a subject in need thereof by using Phellinus linteus, in which the method includes administering an effective dose of composition to the subject, and the composition includes Phellinus linteus (NITE BP-03321 and BCRC 930210) as an effective substance. By using the aforementioned composition including an extract of a fermented product of the Phellinus linteus and/or its derivative, diameters of myotubes, amounts of muscles and muscle muscular endurance can be maintained, thereby improving sarcopenia.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: April 2, 2024
    Assignee: GRAPE KING BIO LTD
    Inventors: Chin-Chu Chen, I-Chen Li, Tsung-Ju Li, Ting-Yu Lu, Yen-Po Chen
  • Patent number: 11948627
    Abstract: A write assist circuit can include a control circuit and a voltage generator. The control circuit can be configured to receive memory address information associated with a memory write operation for memory cells. The voltage generator can be configured to provide a reference voltage to one or more bitlines coupled to the memory cells. The voltage generator can include two capacitive elements, where during the memory write operation, (i) one of the capacitive elements can be configured to couple the reference voltage to a first negative voltage, and (ii) based on the memory address information, both capacitive elements can be configured to cumulatively couple the reference voltage to a second negative voltage that is lower than the first negative voltage.
    Type: Grant
    Filed: August 9, 2022
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hidehiro Fujiwara, Chih-Yu Lin, Sahil Preet Singh, Hsien-Yu Pan, Yen-Huei Chen, Hung-Jen Liao
  • Patent number: 11948800
    Abstract: A device includes a pair of gate spacers on a substrate, and a gate structure on the substrate and between the gate spacers. The gate structure includes an interfacial layer, a metal oxide layer, a nitride-containing layer, a tungsten-containing layer, and a metal compound layer. The interfacial layer is over the substrate. The metal oxide layer is over the interfacial layer. The nitride-containing layer is over the metal oxide layer. The tungsten-containing layer is over the nitride-containing layer. The metal compound layer is over the tungsten-containing layer. The metal compound layer has a different material than a material of the tungsten-containing layer.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: April 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yen-Yu Chen, Yu-Chi Lu, Chih-Pin Tsao, Shih-Hsun Chang
  • Patent number: 11948949
    Abstract: In some embodiments, the present disclosure relates to a device having a semiconductor substrate including a frontside and a backside. On the frontside of the semiconductor substrate are a first source/drain region and a second source/drain region. A gate electrode is arranged on the frontside of the semiconductor substrate and includes a horizontal portion, a first vertical portion, and a second vertical portion. The horizontal portion is arranged over the frontside of the semiconductor substrate and between the first and second source/drain regions. The first vertical portion extends from the frontside towards the backside of the semiconductor substrate and contacts the horizontal portion of the gate electrode structure. The second vertical portion extends from the frontside towards the backside of the semiconductor substrate, contacts the horizontal portion of the gate electrode structure, and is separated from the first vertical portion by a channel region of the substrate.
    Type: Grant
    Filed: July 15, 2022
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Yuan Chen, Ching-Chun Wang, Hsiao-Hui Tseng, Jen-Cheng Liu, Jhy-Jyi Sze, Shyh-Fann Ting, Wei Chuang Wu, Yen-Ting Chiang, Chia Ching Liao, Yen-Yu Chen
  • Publication number: 20240105241
    Abstract: Disclosed herein are related to a memory device. In one aspect, a memory device includes a set of memory cells. In one aspect, the memory device includes a first bit line extending along a direction. The first bit line may be coupled to a subset of the set of memory cells disposed along the direction. In one aspect, the memory device includes a second bit line extending along the direction. In one aspect, the memory device includes a switch coupled between the first bit line and the second bit line.
    Type: Application
    Filed: February 16, 2023
    Publication date: March 28, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Yu Lin, Yi-Hsin Nien, Hidehiro Fujiwara, Yen-Huei Chen
  • Publication number: 20240103602
    Abstract: A power consumption control device applied to an electronic device includes an image signal processor (ISP), a storage device, a processing circuit, and a control circuit. The ISP is arranged to receive an image signal captured by a camera of the electronic device, and process the image signal to generate a processed image signal. The storage device is arranged to store at least one predetermined image class. The processing circuit is arranged to analyze the processed image signal to detect whether the processed image signal belongs to the at least one predetermined image class to generate a control signal. The control circuit is arranged to switch a mode of the electronic device to a first mode or a second mode according to the control signal, wherein power consumption and performance of the electronic device in the first mode are lower than that in the second mode.
    Type: Application
    Filed: April 13, 2023
    Publication date: March 28, 2024
    Applicant: MEDIATEK INC.
    Inventors: Ming-Yu Chen, Yen-Hsiang Li
  • Patent number: 11935757
    Abstract: A method of manufacturing a semiconductor device includes forming a first layer of a first planarizing material over a patterned surface of a substrate, forming a second layer of a second planarizing material over the first planarizing layer, crosslinking a portion of the first planarizing material and a portion of the second planarizing material, and removing a portion of the second planarizing material that is not crosslinked. In an embodiment, the method further includes forming a third layer of a third planarizing material over the second planarizing material after removing the portion of the second planarizing material that is not crosslinked. The third planarizing material can include a bottom anti-reflective coating or a spin-on carbon, and an acid or an acid generator. The first planarizing material can include a spin-on carbon, and an acid, a thermal acid generator or a photoacid generator.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yen-Hao Chen, Wei-Han Lai, Ching-Yu Chang, Chin-Hsiang Lin
  • Publication number: 20240088195
    Abstract: An image sensor device includes a semiconductor substrate, a radiation sensing member, a shallow trench isolation, and a color filter layer. The radiation sensing member is in the semiconductor substrate. An interface between the radiation sensing member and the semiconductor substrate includes a direct band gap material. The shallow trench isolation is in the semiconductor substrate and surrounds the radiation sensing member. The color filter layer covers the radiation sensing member.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Yu WEI, Yen-Liang LIN, Kuo-Cheng LEE, Hsun-Ying HUANG, Hsin-Chi CHEN
  • Publication number: 20240088155
    Abstract: A semiconductor device includes source/drain regions, a gate structure, a first gate spacer, and a dielectric material. The source/drain regions are over a substrate. The gate structure is laterally between the source/drain regions. The first gate spacer is on a first sidewall of the gate structure, and spaced apart from a first one of the source/drain regions at least in part by a void region. The dielectric material is between the first one of the source/drain regions and the void region. The dielectric material has a gradient ratio of a first chemical element to a second chemical element.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Bo-Yu LAI, Kai-Hsuan LEE, Wei-Yang LEE, Feng-Cheng YANG, Yen-Ming CHEN
  • Patent number: 11929116
    Abstract: A memory device and a method for operating the memory device are provided. The memory device includes a memory cell and a bit line connected to the memory cell. A negative voltage generator is connected to the bit line. The negative voltage generator, when enabled, is operative to provide a first write path for the bit line. A control circuit is connected to the negative voltage generator and the bit line. The control circuit is operative to provide a second write path for the bit line when the negative voltage generator is not enabled.
    Type: Grant
    Filed: January 23, 2023
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Hsin Nien, Hidehiro Fujiwara, Chih-Yu Lin, Yen-Huei Chen
  • Patent number: 11920237
    Abstract: The present disclosure provides a multifunction chamber having a multifunctional shutter disk. The shutter disk includes a lamp device, a DC/RF power device, and a gas line on one surface of the shutter disk. With this configuration, simplifying the chamber type is possible as the various specific, dedicated chambers such as a degas chamber, a pre-clean chamber, a CVD/PVD chamber are not required. By using the multifunctional shutter disk, the degassing function and the pre-cleaning function are provided within a single chamber. Accordingly, a separate degas chamber and a pre-clean chamber are no longer required and the overall transfer time between chambers is reduced or eliminated.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Hao Cheng, Yen-Yu Chen, Yi-Ming Dai
  • Publication number: 20240071888
    Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.
    Type: Application
    Filed: August 28, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Chang Lin, Yen-Fu Su, Chin-Liang Chen, Wei-Yu Chen, Hsin-Yu Pan, Yu-Min Liang, Hao-Cheng Hou, Chi-Yang Yu
  • Publication number: 20240055290
    Abstract: Various embodiments of the present application are directed toward an adjustable wafer chuck. The adjustable wafer chuck is configured to hold a wafer. The adjustable wafer chuck comprises a base portion and a pad portion. The base portion comprises a plurality of adjustable base structures. The pad portion is disposed on a first side of the base portion. The pad portion comprises a plurality of contact pads disposed on the plurality of adjustable base structures. Each of the adjustable base structures are configured to move along a plane in a first direction and configured to move along the plane in a second direction that is opposite the first direction.
    Type: Application
    Filed: August 15, 2022
    Publication date: February 15, 2024
    Inventors: Chia-Hsi Wang, Yen-Yu Chen
  • Patent number: 11879862
    Abstract: A sensor and a method of using the sensor are disclosed. The sensor includes a conductive region in electrical communication with two electrodes, the conductive region including a MXene material combined with a mercaptoimidazolyl metal-ligand complex, wherein the MXene has the formula Mn+1Xn and M is at least one of a Group 3 transition metal, Group 4 transition metal, Group 5 transition metal, and Group 6 transition metal, X is carbon, nitrogen or a combination thereof, and n has a value of 1 to 3. The sensor can be used to detect volatile compounds that have a double or triple bond.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: January 23, 2024
    Assignee: Carrier Corporation
    Inventors: Winston Yen-Yu Chen, Lia Antoaneta Stanciu, Alexander Wei, Aiganym Yermembetova
  • Publication number: 20240019778
    Abstract: Metal-comprising resist layers (for example, metal oxide resist layers), methods for forming the metal-comprising resist layers, and lithography methods that implement the metal-comprising resist layers are disclosed herein that can improve lithography resolution. An exemplary method includes forming a metal oxide resist layer over a workpiece by performing deposition processes to form metal oxide resist sublayers of the metal oxide resist layer over the workpiece and performing a densification process on at least one of the metal oxide resist sublayers. Each deposition process forms a respective one of the metal oxide resist sublayers. The densification process increases a density of the at least one of the metal oxide resist sublayers. Parameters of the deposition processes and/or parameters of the densification process can be tuned to achieve different density profiles, different density characteristics, and/or different absorption characteristics to optimize patterning of the metal oxide resist layer.
    Type: Application
    Filed: August 9, 2023
    Publication date: January 18, 2024
    Inventors: Yi-Chen Kuo, Chih-Cheng Liu, Yen-Yu Chen, Jr-Hung Li, Chi-Ming Yang, Tze-Liang Lee
  • Publication number: 20240014019
    Abstract: A deposition apparatus includes a process chamber, a wafer support in the process chamber, a backplane structure having a first surface in the process chamber facing the wafer support, a target having a second surface facing the first surface and a third surface facing the wafer support, and an adhesion structure in physical contact with the backplane structure and the target. The adhesion structure has an adhesion material layer, and a spacer embedded in the adhesion material layer.
    Type: Application
    Filed: September 22, 2023
    Publication date: January 11, 2024
    Inventors: Chia-Hsi WANG, Yen-Yu CHEN
  • Publication number: 20240011160
    Abstract: A precursor supply system for thin film deposition is provided. The precursor supply system includes a precursor source container, and the precursor source container includes: a top wall; a bottom wall; a side wall circumferentially connecting the top wall and the bottom wall, wherein at least a portion of an interior surface of the precursor source container has a three-dimensional (3D) pattern; an inlet configured to allow introduction of a carrier gas into the precursor source container; and an outlet configured to allow exit of a precursor vapor generated in the precursor source container.
    Type: Application
    Filed: July 11, 2022
    Publication date: January 11, 2024
    Inventors: Wen-Hao Cheng, Hsuan-Chih Chu, Yen-Yu Chen
  • Publication number: 20240003993
    Abstract: A thin-film deposition system includes a thin-film deposition chamber. A magnetron assembly is positioned within the thin-film deposition chamber to assist in thin-film deposition processes. A magnetic sensor apparatus is positioned adjacent to the magnetron assembly. The magnetic sensor apparatus includes a plurality of magnetic sensors that each sense the magnetic field in a particular location within the thin-film deposition chamber. The control system generates a magnetic field distribution based on the sensor signals from the magnetic sensors. An analysis model that has been trained with a machine learning process analyzes the magnetic field distribution and determines whether or not an abnormal magnetic field distributions process. The control system can stop the thin-film deposition process based on the output of the analysis model.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Inventors: Wen-Hao CHENG, Hsuan-Chih CHU, Yen-Yu CHEN
  • Publication number: 20230417306
    Abstract: A knob-driven adjusting mechanism has two fastening belts, one adjusting device, two base seats and two shafts. The fastening belt goes through a long groove. The fastening belt is formed with a tooth row on the side of the long groove. The adjusting device has a shell seat and a knob, and each fastening belt respectively goes through the shell seat. The knob is configured on the shell seat in a rotary form to drive the fastening belts. Each base seat is respectively used for the two side parts configured on an object. The base seat has two protruding support parts. Each shaft is respectively configured on each base seat. The two ends of the shaft respectively goes into each support part in the axial direction. Each shaft is respectively connected to each fastening belt, so that each fastening belt can respectively rotate in relation to the base seat.
    Type: Application
    Filed: June 28, 2022
    Publication date: December 28, 2023
    Inventors: Yuan-Ming CHEN, Tuan-Yu CHEN, Yen-Yu CHEN