Patents by Inventor Yeong-dae LIM

Yeong-dae LIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10325922
    Abstract: A semiconductor device includes a substrate, a stacked structure of insulating layers and gate electrodes alternately and repeatedly stacked on the substrate, and a pillar passing through the stacked-layer structure. The insulating layers include lower insulating layers, intermediate insulating layers disposed on the lower insulating layers, and upper insulating layers disposed on the intermediate insulating layers. The lower insulating layers have a hardness less than that of the intermediate insulating layers, and the upper insulating layers have a hardness greater than that of the intermediate insulating layers.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: June 18, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yeong Dae Lim, Seung Jae Jung, Jin Young Bang, Il Woo Kim, Ho Gil Jung
  • Publication number: 20180350830
    Abstract: A semiconductor device includes a substrate, a stacked structure of insulating layers and gate electrodes alternately and repeatedly stacked on the substrate, and a pillar passing through the stacked-layer structure. The insulating layers include lower insulating layers, intermediate insulating layers disposed on the lower insulating layers, and upper insulating layers disposed on the intermediate insulating layers. The lower insulating layers have a hardness less than that of the intermediate insulating layers, and the upper insulating layers have a hardness greater than that of the intermediate insulating layers.
    Type: Application
    Filed: November 17, 2017
    Publication date: December 6, 2018
    Inventors: YEONG DAE LIM, SEUNG JAE JUNG, JIN YOUNG BANG, IL WOO KIM, HO GIL JUNG
  • Patent number: 10121798
    Abstract: A semiconductor device includes a substrate, a stacked structure on the substrate, and a vertical structure in a hole passing through the stacked structure. The stacked structure includes units stacked on top of each other in a direction perpendicular to a top surface of the substrate. The units include first units and second units between the first units. Each of the first units includes a first interlayer insulating layer on a first gate, and each of the second units includes a second interlayer insulating layer on a second gate. A ratio of a thickness of the second interlayer insulating layer with respect to a thickness of the second gate is different from a ratio of a thickness of the first interlayer insulating layer with respect to a thickness of the first gate.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: November 6, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yeong Dae Lim, Seung Jae Jung
  • Publication number: 20180076214
    Abstract: A semiconductor device includes a substrate, a stacked structure on the substrate, and a vertical structure in a hole passing through the stacked structure. The stacked structure includes units stacked on top of each other in a direction perpendicular to a top surface of the substrate. The units include first units and second units between the first units. Each of the first units includes a first interlayer insulating layer on a first gate, and each of the second units includes a second interlayer insulating layer on a second gate. A ratio of a thickness of the second interlayer insulating layer with respect to a thickness of the second gate is different from a ratio of a thickness of the first interlayer insulating layer with respect to a thickness of the first gate.
    Type: Application
    Filed: February 23, 2017
    Publication date: March 15, 2018
    Inventors: Yeong Dae Lim, Seung Jae Jung
  • Patent number: 9643850
    Abstract: A method and apparatus for restoring properties of graphene includes exposing the graphene to plasma having a density in a range from about 0.3*108 cm?3 to about 30*108 cm?3 when the graphene is in a ground state. The method and apparatus may be used for large-area, low-temperature, high-speed, eco-friendly, and silicon treatment of graphene.
    Type: Grant
    Filed: April 17, 2013
    Date of Patent: May 9, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-young Choi, Wonjong Yoo, Yeong-dae Lim
  • Publication number: 20140048411
    Abstract: A method and apparatus for restoring properties of graphene includes exposing the graphene to plasma having a density in a range from about 0.3*108 cm?3 to about 30*108 cm?3 when the graphene is in a ground state. The method and apparatus may be used for large-area, low-temperature, high-speed, eco-friendly, and silicon treatment of graphene.
    Type: Application
    Filed: April 17, 2013
    Publication date: February 20, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-young CHOI, Won-jong YOO, Seung-hwan LEE, Yeong-dae LIM