Abstract: There are provided a high voltage switch circuit and a semiconductor memory device including the same. A high voltage switch circuit may include a switching circuit including a first depletion transistor and a first high voltage transistor, which are coupled in series between an input terminal and an output terminal, and a control signal generator for applying, to the first depletion transistor, a control signal having the same potential level as an input voltage applied to the input terminal, in response to a first enable signal and a second enable signal.

Abstract: There are provided a high voltage switch circuit and a semiconductor memory device including the same. A high voltage switch circuit may include a switching circuit including a first depletion transistor and a first high voltage transistor, which are coupled in series between an input terminal and an output terminal, and a control signal generator for applying, to the first depletion transistor, a control signal having the same potential level as an input voltage applied to the input terminal, in response to a first enable signal and a second enable signal.

Abstract: Provided herein are a power-on reset circuit and a semiconductor memory device including the same. The power-on reset circuit may include: a voltage dividing circuit suitable for dividing an external power supply voltage to output a reference voltage, an output node control circuit suitable for controlling a potential level of an output node to an external power supply voltage level or a ground power supply voltage level in response to the reference voltage, and a buffer circuit suitable for buffering the potential level of the output node to output a power-on reset signal. In the voltage dividing circuit, a potential level of the reference voltage in a power up period is different from a potential level of the reference voltage in a power down period.

Abstract: There are provided a high voltage switch circuit and a semiconductor memory device including the same. A high voltage switch circuit may include a switching circuit including a first depletion transistor and a first high voltage transistor, which are coupled in series between an input terminal and an output terminal, and a control signal generator for applying, to the first depletion transistor, a control signal having the same potential level as an input voltage applied to the input terminal, in response to a first enable signal and a second enable signal.

Abstract: There are provided a high voltage switch circuit and a semiconductor memory device including the same. A high voltage switch circuit may include a switching circuit including a first depletion transistor and a first high voltage transistor, which are coupled in series between an input terminal and an output terminal, and a control signal generator for applying, to the first depletion transistor, a control signal having the same potential level as an input voltage applied to the input terminal, in response to a first enable signal and a second enable signal.

Abstract: There are provided a high voltage switch circuit and a semiconductor memory device including the same. A high voltage switch circuit may include a switching circuit including a first depletion transistor and a first high voltage transistor, which are coupled in series between an input terminal and an output terminal, and a control signal generator for applying, to the first depletion transistor, a control signal having the same potential level as an input voltage applied to the input terminal, in response to a first enable signal and a second enable signal.

Abstract: The present invention relates to a technique for outputting threshold voltages by properly changing the threshold voltages such that the threshold voltages can protect low-voltage driving elements within an analog to digital converter when the threshold voltages of an OLED display panel are sensed and outputted to the analog to digital converter. The present invention comprises: a sampling capacitor which samples threshold voltages sensed and inputted from an organic light-emitting diode on a display panel; a charge-sharing capacitor which charges and shares the threshold voltages sampled from the sampling capacitor, or solely charges the threshold voltages to bypass the threshold voltages; and a sample-and-hold unit which has a plurality of switches for performing switching operations for the sampling operation of the sampling capacitor and the charging and the sharing of the charge-sharing capacitor, and scales the threshold voltages to threshold voltage areas having a certain value or less.

Abstract: There are provided a high voltage switch circuit and a semiconductor memory device including the same. A high voltage switch circuit may include a switching circuit including a first depletion transistor and a first high voltage transistor, which are coupled in series between an input terminal and an output terminal, and a control signal generator for applying, to the first depletion transistor, a control signal having the same potential level as an input voltage applied to the input terminal, in response to a first enable signal and a second enable signal.

Abstract: A nonvolatile memory device may include a power-on reset signal generation unit suitable for receiving a power supply voltage, and generating a power-on reset signal that changes based on the power supply voltage, and a discharging signal generation unit suitable for generating a discharging signal for discharging a word line to be activated earlier than an activation timing of the power-on reset signal when the power supply voltage decreases.

Abstract: Provided is a malfunction prevention circuit for a COG-form source driver integrated circuit with a power sequence in which a low voltage is applied after a high voltage is applied. The malfunction prevention circuit includes: a level shifter configured to process an input signal using the low voltage and output a control signal using the high voltage; and an initialization circuit configured to initialize the control signal to a constant voltage while an initialization signal is enabled. The initialization signal is enabled during a predetermined time from the time at which the low voltage starts to be applied at the initial stage of the power sequence.

Abstract: A voltage regulator includes: a comparator configured to compare a feedback voltage with a reference voltage to output an enable signal and operate based on a bias current; a pass transistor turned on according to the enable signal and configured to output an external power voltage as an output voltage; a voltage distribution circuit configured to distribute and output the output voltage to an input terminal of the comparator; and a bias current control unit configured to control an amount of the bias current supplied to the comparator based on the output voltage.

Abstract: A nonvolatile memory device may include a power-on reset signal generation unit suitable for receiving a power supply voltage, and generating a power-on reset signal that changes based on the power supply voltage, and a discharging signal generation unit suitable for generating a discharging signal for discharging a word line to be activated earlier than an activation timing of the power-on reset signal when the power supply voltage decreases.

Abstract: The present invention relates to an output voltage stabilization circuit. Specifically, the present invention relates to an output voltage stabilization circuit of a display device driving circuit, which generates a reference current dependent on a high source voltage using a current source independent of a magnitude of the high source voltage, generates a reference current dependent on a low source voltage using a current source independent of a magnitude of the low source voltage, and then generates a control signal by comparing the magnitudes to each other, whereby the output voltage stabilization circuit may stabilize an output voltage regardless of an order in which the low source voltage and the high source voltage are turned off in a circuit using both the low source voltage and the high source voltage.

Abstract: A voltage regulator includes: a comparator configured to compare a feedback voltage with a reference voltage to output an enable signal and operate based on a bias current; a pass transistor turned on according to the enable signal and configured to output an external power voltage as an output voltage; a voltage distribution circuit configured to distribute and output the output voltage to an input terminal of the comparator; and a bias current control unit configured to control an amount of the bias current supplied to the comparator based on the output voltage.

Abstract: Disclosed is a liquid crystal panel driving circuit of display stabilization, including: a plurality of output buffers buffering data voltage and supplying or cutting off the buffered data voltage to or from each of the plurality of data lines; an output MUX switch receiving outputs from two adjacent output buffers of the plurality of output buffers and transferring one of the two outputs to the plurality of data lines; a garbage switch connecting each of the plurality of data lines to a ground terminal; and a power on sensor or a power off sensor generating a power on or off reset signal in response to a turn on/off of a power supply voltage, wherein the output MUX switch is turned-off and the charge share switch and the garbage switch are turned-on, in response to the power on reset signal or the power off reset signal.

Abstract: The present invention relates to a technique for outputting threshold voltages by properly changing the threshold voltages such that the threshold voltages can protect low-voltage driving elements within an analog to digital converter when the threshold voltages of an OLED display panel are sensed and outputted to the analog to digital converter. The present invention comprises: a sampling capacitor which samples threshold voltages sensed and inputted from an organic light-emitting diode on a display panel; a charge-sharing capacitor which charges and shares the threshold voltages sampled from the sampling capacitor, or solely charges the threshold voltages to bypass the threshold voltages; and a sample-and-hold unit which has a plurality of switches for performing switching operations for the sampling operation of the sampling capacitor and the charging and the sharing of the charge-sharing capacitor, and scales the threshold voltages to threshold voltage areas having a certain value or less.

Abstract: Provided is a malfunction prevention circuit for a COG-form source driver integrated circuit with a power sequence in which a low voltage is applied after a high voltage is applied. The malfunction prevention circuit includes: a level shifter configured to process an input signal using the low voltage and output a control signal using the high voltage; and an initialization circuit configured to initialize the control signal to a constant voltage while an initialization signal is enabled. The initialization signal is enabled during a predetermined time from the time at which the low voltage starts to be applied at the initial stage of the power sequence.

Abstract: The present invention relates to an output voltage stabilization circuit. Specifically, the present invention relates to an output voltage stabilization circuit of a display device driving circuit, which generates a reference current dependent on a high source voltage using a current source independent of a magnitude of the high source voltage, generates a reference current dependent on a low source voltage using a current source independent of a magnitude of the low source voltage, and then generates a control signal by comparing the magnitudes to each other, whereby the output voltage stabilization circuit may stabilize an output voltage regardless of an order in which the low source voltage and the high source voltage are turned off in a circuit using both the low source voltage and the high source voltage.

Abstract: Disclosed is a liquid crystal panel driving circuit of display stabilization, including: a plurality of output buffers buffering data voltage and supplying or cutting off the buffered data voltage to or from each of the plurality of data lines; an output MUX switch receiving outputs from two adjacent output buffers of the plurality of output buffers and transferring one of the two outputs to the plurality of data lines; a garbage switch connecting each of the plurality of data lines to a ground terminal; and a power on sensor or a power off sensor generating a power on or off reset signal in response to a turn on/off of a power supply voltage, wherein the output MUX switch is turned-off and the charge share switch and the garbage switch are turned-on, in response to the power on reset signal or the power off reset signal.

Abstract: A DAC circuit using a charge subtraction method and a change transfer interpolation method includes resistor cells configured to divide a voltage of data of total K bits (=upper M bits+lower N bits) by resistance dividers; a decoder group configured to receive digital data of the M bits and the N bits divided in the resistor cells, process the digital data by the unit of 2 bits, and output respective corresponding voltages; a capacitor group configured to receive the voltages outputted from the decoder group and realize charge charging by a charge subtraction method and charge transferring by a charge transfer interpolation method; and an operational amplifier having a first input terminal which receives a reference voltage and a second input terminal which receives an interpolation voltage corresponding to an amount of charges transferred from the capacitor group, and configured to generate an output voltage.