Abstract: The epitaxial lateral overgrowth (ELOG) GaN obtains the dangling structure by using wet etching and the transferred substrate to separate from the GaN epitaxy layer by using stress concentration of thermal expansion coefficient of the transferred substrate. It is useful to separate of the GaN epitaxy layer and transferred substrate by using anneal of wafer bonding. The present invention is to provide high selective etching rate, no damage to epitaxial film, low cost, and feasibility for larger commercial sizes. The wet etching method can not damage the separated epitaxial substrate, thus the substrate can be reused. There are various choices of handling substrate for bonding, not limited by the epitaxial method. When the epitaxial film is applied in devices, the low defect density of the epitaxial film can enhance the lifetime and efficiency of the devices. The addition of this improved fabrication process does not require expensive equipment. Moreover, it will reduce the production cost.

Abstract: Present invention is a method for lifting off GaN pseudomask epitaxy layer using wafer bonding way, wherein GaN epitaxy is obtained by way of selective area growth on a seed and the growth is in a way of pseudomask growth over a substrate. Owing to the different thermal expansion coefficients of the substrate and the GaN seed, by way of annealing and wafer bonding, the GaN epitaxy layer and the epitaxy substrate can be separated, or the GaN epitaxy substrate can be transferred onto another substrate. Thereby, the epitaxy substrate separated is not spoiled during the transferring procedure and can be reused, which lowers the cost; and high-quality GaN epitaxy layer can be transferred to various kinds of substrates for various kinds of usage and for solving the problems of difficulties in the production or the utilization of the substrate (such as difficulties in the cutting, the conductivity, the heat-sinking, and so on.

Abstract: A method for forming a thin film transistor (TFT) is disclosed. The invention uses metal electroless plating or chemical displacement processes to form metal clusters adjacent the sidewall of amorphous silicon active region pattern so as to crystallize the amorphous silicon amid the subsequently performed metal induced lateral crystallization (MILC) process. The amorphous silicon is crystallized to form polysilicon having parallel grains. Since the amorphous silicon will crystallize with a specific angle which is measured between the grain orientation and the side wall of the amorphous silicon, a tilt channel connecting the source and drain region of the TFT is utilized to upgrade the electron mobility across the tilt channel, wherein the grain orientation of polysilicon in the tilt channel perpendicular to a gate electrode which is subsequently formed above the tilt channel.