Patents by Inventor Yezhou FANG

Yezhou FANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11960164
    Abstract: Provided is a black matrix structure. The black matrix structure includes a plurality of black matrix strips that are intersected with each other, wherein a width the black matrix strip ranges from 2 to 2.5 microns, and a distance between any two adjacent black matrix strips in the plurality of black matrix strips ranges from 4 to 5 microns.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: April 16, 2024
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Qiang Chen, Yezhou Fang, Gaofei Xia, Xiahong Bai
  • Patent number: 11889721
    Abstract: A method of manufacturing a display substrate includes: forming a switch unit on a base substrate; forming a planarization layer on one side of the switch unit away from the base substrate, wherein a region, corresponding to an output electrode, of the planarization layer is provided with a planarization layer via hole, and an orthographic projection of the planarization layer via hole onto the base substrate is located within an orthographic projection region of the output electrode onto the base substrate; etching a surface of a region, corresponding to the planarization layer via hole, of the output electrode; and forming a pixel electrode on one side of the planarization layer away from the switch unit, wherein the pixel electrode is in contact with the output electrode through the planarization layer via hole.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: January 30, 2024
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Feng Li, Yezhou Fang
  • Patent number: 11869976
    Abstract: A thin film transistor and a manufacturing method therefor, an array substrate, and a display device. The thin film transistor includes an active layer, a gate insulating layer, and a gate electrode; the gate insulating layer is located on one side of the active layer; the gate electrode is located on one side of the gate insulating layer distant from the active layer; the gate electrode includes an opening a part of the active layer overlapped with the opening includes a first lightly doped region, a first heavily doped region, and a second lightly doped region that are sequentially arranged along a first direction parallel to a plane where the active layer is located.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: January 9, 2024
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lei Yan, Jun Fan, Yezhou Fang, Feng Li, Wei Li, Lei Li, Yusheng Liu, Yanyan Meng
  • Publication number: 20230333424
    Abstract: Provided is a black matrix structure. The black matrix structure includes a plurality of black matrix strips that are intersected with each other, wherein a width the black matrix strip ranges from 2 to 2.5 microns, and a distance between any two adjacent black matrix strips in the plurality of black matrix strips ranges from 4 to 5 microns.
    Type: Application
    Filed: June 8, 2021
    Publication date: October 19, 2023
    Applicants: Ordos Yuansheng Optoelectronics Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Qiang CHEN, Yezhou FANG, Gaofei XIA, Xiahong BAI
  • Patent number: 11762489
    Abstract: An array substrate includes a base substrate; a common electrode layer including a plurality of common electrodes, arranged in an array, a part of which being also used as first touch electrodes and another part of which being also used as second touch electrodes; a first conductive layer including a plurality of electrode connecting lines, each row of first touch electrodes being coupled serially by at least one electrode connecting line; and a second conductive layer including a plurality of first touch signal lines and a plurality of second touch signal lines, each row of first touch electrodes being coupled to at least one first touch signal line which is configured to transmit a first touch signal; each second touch electrode or each column of second touch electrodes being coupled to at least one second touch signal line which is configured to transmit a second touch signal.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: September 19, 2023
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhixuan Guo, Fengguo Wang, Yezhou Fang, Xinguo Wu, Hong Liu, Shiyu Zhang, Lei Li
  • Patent number: 11637134
    Abstract: An array substrate and a method for manufacturing the same, and a display device are provided. The array substrate includes a base substrate and the array substrate includes a plurality of pixel units. In each of the plurality of pixel units, the array substrate includes a thin film transistor and a storage capacitor disposed above the base substrate, the storage capacitor includes a metal layer, an intermediate layer, and a reflective layer disposed in a stacked manner, the metal layer being adjacent to the base substrate. The array substrate further includes a common electrode layer disposed on a side of the storage capacitor facing away from the base substrate, the reflective layer is electrically connected to the common electrode layer, and the metal layer is electrically connected to an active layer of the thin film transistor.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: April 25, 2023
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jinjin Xue, Dawei Shi, Feng Li, Lei Yao, Wentao Wang, Haifeng Xu, Lu Yang, Lin Hou, Jinfeng Wang, Mei Li, Yezhou Fang
  • Publication number: 20230118501
    Abstract: An array substrate includes a base substrate; a common electrode layer including a plurality of common electrodes, arranged in an array, a part of which being also used as first touch electrodes and another part of which being also used as second touch electrodes; a first conductive layer including a plurality of electrode connecting lines, each row of first touch electrodes being coupled serially by at least one electrode connecting line; and a second conductive layer including a plurality of first touch signal lines and a plurality of second touch signal lines, each row of first touch electrodes being coupled to at least one first touch signal line which is configured to transmit a first touch signal; each second touch electrode or each column of second touch electrodes being coupled to at least one second touch signal line which is configured to transmit a second touch signal.
    Type: Application
    Filed: December 13, 2019
    Publication date: April 20, 2023
    Inventors: Zhixuan GUO, Fengguo WANG, Yezhou FANG, Xinguo WU, Hong LIU, Shiyu ZHANG, Lei LI
  • Publication number: 20220406945
    Abstract: The present disclosure provides a thin film transistor, a display substrate and a display device, and belongs to the field of display technology. The thin film transistor of the present disclosure includes: a base, and a gate, an active layer, a source and a drain located on the base, where the gate includes a first gate and a second gate which are sequentially provided on the base and are electrically connected to each other; the active layer is located between the first gate and the second gate, and orthographic projections of the first gate and the second gate on the base are partially overlapped with an orthographic projection of the active layer on the base, and the orthographic projections of the first gate and the second gate on the base are partially overlapped with each other.
    Type: Application
    Filed: May 21, 2021
    Publication date: December 22, 2022
    Inventors: Chenglong WANG, Yezhou FANG, Feng LI, Lei YAO, Lei YAN, Kai LI, Lin HOU, Xiaogang ZHU, Yun GAO, Yanzhao PENG, Teng YE, Hua YANG
  • Publication number: 20220350196
    Abstract: The present disclosure discloses a color filter substrate and a method for manufacturing the same, a display panel, and a display device, which relates to the field of display technologies. A black matrix layer in the color filter substrate includes a first film layer and a second film layer. As a material of the first film layer is different from a material of the second film layer, at least one of the first film layer and the second film layer is prepared without using a resin adhesive, and then the resin adhesive remaining in at least one through-hole of the first through-holes of the first film layer and the second through-holes of the second film layer can be reduced, and the display effect of the display device is ensured.
    Type: Application
    Filed: December 2, 2020
    Publication date: November 3, 2022
    Inventors: Lei YAO, Yezhou FANG, Feng LI, Lei YAN, Kai LI, Chenglong WANG, Teng YE, Lin HOU, Xiaofang LI
  • Publication number: 20220308269
    Abstract: A color filter substrate, a manufacturing method thereof, a display panel and a display device are provided. The color filter substrate includes a substrate; and a black matrix arranged on the substrate, wherein the black matrix includes a first shading strip extending along a sub-pixel length direction and a second shading strip extending along a sub-pixel width direction, and the first shading strip is made of a metal material.
    Type: Application
    Filed: January 8, 2021
    Publication date: September 29, 2022
    Inventors: Feng YANG, Yezhou FANG, Qiang CHEN, Xiaojin LI, Fang ZHU
  • Publication number: 20220252926
    Abstract: Embodiments of the present disclosure provide a display substrate and a display panel. The display substrate has a light-transmissive region and a light-shielding region, and the light-shielding region includes a main support region and a secondary support region. The display substrate includes a substrate, an alignment layer on the substrate, and a convex structure on the alignment layer. The convex structure is on a side of the alignment layer distal to the substrate and at least in the main support region, and a distance from a surface of the convex structure distal to the substrate to the substrate is greater than a distance from a surface of the alignment layer distal to the substrate to the substrate.
    Type: Application
    Filed: January 21, 2021
    Publication date: August 11, 2022
    Inventors: Kai LI, Feng LI, Yezhou FANG, Xinguo WU, Lei YAO, Chenglong WANG, Zhixuan GUO, Lei YAN
  • Patent number: 11362115
    Abstract: The present disclosure relates to the technical field of display. Disclosed are an array substrate and a preparation method therefor, and a display panel and a display device. The array substrate includes: a substrate; multiple gate lines, wherein the gate lines are located on the substrate, and extend along a first direction; multiple data lines, wherein the data lines are located on the substrate, and extend along a second direction, and the gate lines and the data lines intersect to define multiple pixel areas; and a touch-control electrode wiring wherein the touch-control electrode wiring has the same direction as that of the gate lines, and is arranged insulated from the gate lines on a different layer, and the orthographic projection of the touch-control electrode wiring on the substrate at least has an overlapping area with the orthographic projection of part of the gate lines on the substrate.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: June 14, 2022
    Assignees: Ordos Yuansheng Optoelectronics Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Zhixuan Guo, Fengguo Wang, Yezhou Fang, Feng Li, Xinguo Wu, Hong Liu, Zifeng Wang, Lei Li, Kai Li, Liang Tian, Jing Zhao, Zhengkui Wang, Bo Ma, Haiqin Liang, Peng Liu
  • Patent number: 11362040
    Abstract: An array substrate, a display device and a method for manufacturing the array substrate are provided. The array substrate includes a display region and a peripheral wiring region, wherein the array substrate includes: a base substrate; a peripheral circuit in the peripheral wiring region and on the base substrate; and an electrostatic shielding layer disposed over the peripheral circuit and the base substrate.
    Type: Grant
    Filed: October 1, 2018
    Date of Patent: June 14, 2022
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS EQUIPMENT MANUFACTURING BASE, DONGSHENG
    Inventors: Yanyan Zhao, Fuqiang Tang, Jingyi Xu, Yuelin Wang, Yezhou Fang
  • Patent number: 11342460
    Abstract: A thin film transistor, a method for fabricating the same, an array substrate, a display panel, and a display device are provided. The thin film transistor includes a substrate, and an active layer on the substrate, wherein the active layer includes a poly-silicon layer and has a channel region and two electrode connection regions respectively on two sides of the channel region, and the channel region includes a plurality of lightly drain doping segments, which are spaced apart along from one of the electrode connection regions to the other electrode connection region, and channel segments located between the lightly drain doping segments.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: May 24, 2022
    Assignees: Ordos Yuansheng Optoelectronics Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Zhixuan Guo, Fengguo Wang, Yezhou Fang, Xinguo Wu, Hong Liu, Kai Li, Liang Tian, Shiyu Zhang
  • Patent number: 11237657
    Abstract: Embodiments of the present disclosure provide an array substrate, a method of manufacturing the array substrate, a display panel and a display apparatus. The array substrate includes: a substrate; a touch pad disposed on a side of the substrate; a first planarization layer disposed on a side of the touch pad facing away from the substrate; a first passivation layer disposed on a side of the first planarization layer facing away from the touch pad; a touch electrode layer disposed on a side of the first passivation layer facing away from the first planarization layer; and a first via hole sequentially passing through at least the first planarization layer and the first passivation layer. The touch electrode layer is electrically connected to the touch pad through the first via hole.
    Type: Grant
    Filed: March 19, 2020
    Date of Patent: February 1, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Chenglong Wang, Yezhou Fang, Feng Li, Xinguo Wu, Xiaogang Zhu, Guojiang Yu
  • Patent number: 11231610
    Abstract: The present disclosure is related to a display panel. The display panel may include a first light shielding layer (101) in a display region and a second light shielding layer (212) opposite the first light shielding layer (101) in the display region. The first light shielding layer (101) may include a plurality of first openings (112), and the second light shielding layer (212) may include a plurality of second openings (222). The display region may include a middle display region (20A) and a periphery display region (20B). An area of each of the plurality of the first openings (112) in the periphery display region (20B) may be smaller than an area of each of the plurality of the first openings (112) in the middle display region (20A).
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: January 25, 2022
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaokang Wang, Yanqing Chen, Jianyun Xie, Wei Li, Cheng Li, Le Sun, Wei Zhang, Xin Zhao, Zhijun Niu, Yezhou Fang, Pan Guo, Yanfeng Li, Weida Qin, Ning Wang
  • Publication number: 20210408186
    Abstract: A method of manufacturing a display substrate includes: forming a switch unit on a base substrate; forming a planarization layer on one side of the switch unit away from the base substrate, wherein a region, corresponding to an output electrode, of the planarization layer is provided with a planarization layer via hole, and an orthographic projection of the planarization layer via hole onto the base substrate is located within an orthographic projection region of the output electrode onto the base substrate; etching a surface of a region, corresponding to the planarization layer via hole, of the output electrode; and forming a pixel electrode on one side of the planarization layer away from the switch unit, wherein the pixel electrode is in contact with the output electrode through the planarization layer via hole.
    Type: Application
    Filed: July 16, 2019
    Publication date: December 30, 2021
    Inventors: Feng Li, Yezhou Fang
  • Patent number: 11211502
    Abstract: Provided is a transistor, the transistor being located on a base and having an active layer, and the active layer of the transistor comprising a plurality of semiconductor patterns which are stacked, wherein the plurality of semiconductor patterns are electrically connected; and orthographic projections of any two of the semiconductor patterns on the base are different in shape. A method of manufacturing a transistor, a transistor device, and a display substrate and apparatus are also provided.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: December 28, 2021
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lei Yan, Jianyun Xie, Yezhou Fang, Jun Fan, Feng Li
  • Patent number: 11189216
    Abstract: A rapid discharging circuit, a display device, a rapid discharging method and a display control circuit are provided. The rapid discharging circuit includes a discharging unit. A control end of the discharging unit is connected to a driving IC, a first end thereof is connected to a gate line of the display device, and a second end thereof is connected to a display level end of the display device which is connected to the driving IC. The discharging unit is configured to control the display level end to write a first level into the gate line when the display device is powered off abnormally.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: November 30, 2021
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Shicheng Sun, Zhen Wang, Lele Cong, Yezhou Fang, Peirong Huo
  • Publication number: 20210367081
    Abstract: A thin film transistor and a manufacturing method therefor, an array substrate, and a display device. The thin film transistor includes an active layer, a gate insulating layer, and a gate electrode; the gate insulating layer is located on one side of the active layer; the gate electrode is located on one side of the gate insulating layer distant from the active layer; the gate electrode includes an opening a part of the active layer overlapped with the opening includes a first lightly doped region, a first heavily doped region, and a second lightly doped region that are sequentially arranged along a first direction parallel to a plane where the active layer is located.
    Type: Application
    Filed: August 25, 2020
    Publication date: November 25, 2021
    Inventors: Lei YAN, Jun FAN, Yezhou FANG, Feng Li, Wei LI, Lei LI, Yusheng LIU, Yanyan MENG