Patents by Inventor Yi Cheng

Yi Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145581
    Abstract: In a method of manufacturing a semiconductor device, a fin structure having a channel region protruding from an isolation insulating layer disposed over a semiconductor substrate is formed, a cleaning operation is performed, and an epitaxial semiconductor layer is formed over the channel region. The cleaning operation and the forming the epitaxial semiconductor layer are performed in a same chamber without breaking vacuum.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ya-Wen CHIU, Yi Che CHAN, Lun-Kuang TAN, Zheng-Yang PAN, Cheng-Po CHAU, Pin-Chu LIANG, Hung-Yao CHEN, De-Wei YU, Yi-Cheng LI
  • Publication number: 20240145743
    Abstract: A fuel supply apparatus for a fuel cell system, the apparatus comprising a manifold unit comprising a body; a fuel supply flow path by which fuel is supplied to an inlet of said fuel cell system, the fuel supply flow path extending at least partly through the body of the manifold unit; a fuel recirculation flow path by which residual fuel is transferred from an outlet of said fuel cell system to the fuel supply flow path, the fuel recirculation flow path extending at least partly through the body of the manifold unit; at least one valve for controlling flow along the fuel supply flow path and/or the fuel recirculation flow path, wherein the at least one valve is integral to the body of the manifold unit; and a heating apparatus, wherein at least a heating portion of the heating apparatus is integral to the body of the manifold unit.
    Type: Application
    Filed: February 14, 2022
    Publication date: May 2, 2024
    Inventors: Yi Liu, Jing Cheng, Yujie Bai
  • Publication number: 20240144098
    Abstract: Aspects of the present disclosure provide an automated labeling system. For example, the automated labeling system can include an automated labeling module (ALM) configured to receive wireless signals and ground truth of learning object and label the wireless signals with the ground truth when receiving the ground truth to generate labeled training data. The automated labeling system can also include a training database coupled to the ALM. The training database can be configured to store the labeled training data.
    Type: Application
    Filed: October 16, 2023
    Publication date: May 2, 2024
    Applicant: MEDIATEK INC.
    Inventors: Chao Peng WANG, Chia-Da LEE, Po-Yu CHEN, Hsiao-Chien CHIU, Yi-Cheng LU
  • Publication number: 20240147405
    Abstract: A controlling method for a wireless communication device is provided. The controlling method for the wireless communication device includes: attaching a first Universal Subscriber Identity Module (USIM) to a Long-Term Evolution (LTE) network; determining whether a second USIM is camped on the LTE network; detecting whether a paging collision is happened, if the second USIM is camped on the LTE network; generating a requested International Mobile Subscriber Identity (IMSI) offset for the second USIM, if the paging collision is happened, wherein the requested IMSI offset is 1 or min(T, nB)?1, T is a default paging period and nB is a number of paging occurrences within the default paging period; transmitting an attach request with the requested IMSI offset to the LTE network for the second USIM; receiving a negotiated IMSI offset from the LTE network; and attaching the second USIM to the LTE network with the negotiated IMSI offset.
    Type: Application
    Filed: November 1, 2023
    Publication date: May 2, 2024
    Inventors: Kuan-Yu LIN, Ya-ling Hsu, Wan-Ting Huang, Yi-Han CHUNG, Yi-Cheng CHEN
  • Publication number: 20240142833
    Abstract: An electronic device includes a substrate, a driving element, a first insulating layer, a pixel electrode layer, and a common electrode layer. The driving element is disposed on the substrate. The first insulating layer is disposed on the driving element. The pixel electrode layer is disposed on the first insulating layer. The first insulating layer comprises a hole, and the pixel electrode layer is electrically connected to the driving element through the hole. The common electrode layer is disposed on the pixel electrode layer. The common electrode layer comprises a slit, and the slit has an edge, and the edge is disposed in the hole.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 2, 2024
    Applicant: Innolux Corporation
    Inventors: Wei-Yen Chiu, Ming-Jou Tai, You-Cheng Lu, Yi-Shiuan Cherng, Yi-Hsiu Wu, Chia-Hao Tsai, Yung-Hsun Wu
  • Publication number: 20240145715
    Abstract: A battery positive electrode material including lithium ferromanganese phosphate particles and active particles dispersed in voids between the lithium ferromanganese phosphate particles. The active particles include one or more of lithium nickel cobalt manganate particles, lithium nickel cobalt aluminate particles, lithium-rich manganese-based material particles, lithium cobaltate particles, spinel lithium manganate LiMn2O4 particles and layered lithium manganate LiMnO2 particles. The ratio of the median particle diameter of lithium ferromanganese phosphate to that of the active particles is between 3 and 8. In the battery positive electrode material, the content of percentage by weight of the lithium ferromanganese phosphate is between 70% and 90%, and the content of percentage by weight of the active particles is between 10% and 30%.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Inventors: Bin CHENG, Yi PAN, Minghao ZHUANG, Ruoyi DENG, Pengyu WU
  • Patent number: 11974367
    Abstract: A lighting device includes a light board and a light dimmer circuit. The light board includes multiple first light emitting elements and second light emitting elements. The first light emitting elements are disposed in a first area of the light board. The second light emitting elements are disposed in a second area of the light board. The light dimmer circuit is configured to drive the second light emitting elements to generate flickering lights from the second area of the light board, and is configured to drive the first light emitting elements to generate non-flickering lights from the first area of the light board.
    Type: Grant
    Filed: October 4, 2022
    Date of Patent: April 30, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chih-Hsien Wang, Ming-Chieh Cheng, Po-Yen Chen, Shih-Chieh Chang, Kuan-Hsien Tu, Xiu-Yi Lin, Ling-Chun Wang
  • Patent number: 11970688
    Abstract: Cell monitoring apparatus includes sensing chip and channel module. Sensing chip includes channel region, source and drain regions, and sensing film. The channel region includes first semiconductor material. The source and drain regions are disposed at opposite sides of the channel region, and include a second semiconductor material. Sensing film is disposed on the channel region at a sensing surface of the sensing chip. Channel module is disposed on the sensing surface of sensing chip. A microfluidic channel is formed between the sensing surface of the sensing chip and a proximal surface of the channel module. The microfluidic channel includes a culture chamber and a micro-well. The culture chamber is concave into the proximal surface of the channel module, and overlies the channel region. The micro-well is concave into a side of the culture chamber, and directly faces the sensing film.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Hsing Hsiao, Jui-Cheng Huang
  • Publication number: 20240133467
    Abstract: A waterproof click pad device includes a click pad, a frame and a waterproof unit. The frame surrounds the click pad and surrounds an axis passing through the click pad. The waterproof unit is transverse to the axis and is in sheet form. The waterproof unit includes a frame adhesive member surrounding the axis and adhered to the frame, a first non-adhesive member surrounding the axis, connected to an inner periphery of the frame adhesive member and spaced apart from and located above the frame, a second non-adhesive member surrounding the axis, connected to an inner periphery of the first non-adhesive member and spaced apart from and located above the click pad and the frame, and an plate adhesive member connected to an inner periphery of the second non-adhesive member and adhered to the click pad.
    Type: Application
    Filed: January 4, 2023
    Publication date: April 25, 2024
    Applicant: SUNREX TECHNOLOGY CORP.
    Inventors: Yu-Xiang GENG, Chun-Chieh CHEN, Ling-Cheng TSENG, Yi-Wen TSAI, Ching-Yao HUANG
  • Publication number: 20240136346
    Abstract: A semiconductor die package includes an inductor-capacitor (LC) semiconductor die that is directly bonded with a logic semiconductor die. The LC semiconductor die includes inductors and capacitors that are integrated into a single die. The inductors and capacitors of the LC semiconductor die may be electrically connected with transistors and other logic components on the logic semiconductor die to form a voltage regulator circuit of the semiconductor die package. The integration of passive components (e.g., the inductors and capacitors) of the voltage regulator circuit into a single semiconductor die reduces signal propagation distances in the voltage regulator circuit, which may increase the operating efficiency of the voltage regulator circuit, may reduce the formfactor for the semiconductor die package, may reduce parasitic capacitance and/or may reduce parasitic inductance in the voltage regulator circuit (thereby improving the performance of the voltage regulator circuit), among other examples.
    Type: Application
    Filed: April 17, 2023
    Publication date: April 25, 2024
    Inventors: Chien Hung LIU, Yu-Sheng CHEN, Yi Ching ONG, Hsien Jung CHEN, Kuen-Yi CHEN, Kuo-Ching HUANG, Harry-HakLay CHUANG, Wei-Cheng WU, Yu-Jen WANG
  • Publication number: 20240134136
    Abstract: An optical transceiver module temperature control device includes a processor, a printed circuit board assembly, an optical transceiver module and a temperature adjustment element. The processor is configured to measure an ambient temperature. The printed circuit board assembly includes a first side and a second side. The first side is opposite to the second side. The optical transceiver module is disposed on the first side of the printed circuit board assembly. The temperature adjustment element is coupled to the processor and disposed on the second side of the printed circuit board assembly. The processor is configured to generate a temperature adjustment signal according to the ambient temperature and an operating temperature range. The temperature adjustment element is configured to perform heat exchange with the printed circuit board assembly according to the temperature adjustment signal to adjust a temperature of the optical transceiver module into the operating temperature range.
    Type: Application
    Filed: October 23, 2023
    Publication date: April 25, 2024
    Applicant: Formerica Optoelectronics, Inc.
    Inventors: Yun-Cheng HUANG, Yi-Nan SHIH, Chih-Chung LIN, Yun-Chin TSAI
  • Patent number: 11967571
    Abstract: A semiconductor structure and a method of fabricating therefor are disclosed. A second contact pad (500) is arranged lateral to a first contact pad (420) in an interconnect structure (400). As a result, during fabrication of the interconnect structure (400), the first contact pad (420) will not be present alone in a large bland area, due to the presence of the second contact pad (500). Thus, a pattern feature for the first contact pad (420) will not be over-resolved, increasing formation accuracy of the first contact pad (420) and thus guaranteeing good electrical transmission performance of the resulting interconnect structure (400).
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: April 23, 2024
    Assignee: FUJIAN JINHUA INTEGRATED CIRCUIT CO., LTD.
    Inventors: Yi-Wang Jhan, Yung-Tai Huang, Xin You, Xiaopei Fang, Yu-Cheng Tung
  • Patent number: 11967272
    Abstract: A sweep voltage generator and a display panel are provided. The sweep voltage generator includes an output node, a current generating block and a voltage regulating block. The output node is used to provide a sweep signal. The current generating block is coupled to the output node, includes a detection path for detecting an output load variation on the output node, and adjusts the sweep signal provided by the output node based on the output load variation. The voltage regulating block is coupled to the output node for regulating a voltage of the output node.
    Type: Grant
    Filed: December 9, 2022
    Date of Patent: April 23, 2024
    Assignees: AUO Corporation, National Cheng-Kung University
    Inventors: Chih-Lung Lin, Yi-Chen Huang, Chih-I Liu, Po-Cheng Lai, Ming-Yang Deng, Chia-En Wu, Ming-Hung Chuang, Chia-Tien Peng
  • Patent number: 11965217
    Abstract: A method and a kit for detecting Mycobacterium tuberculosis are provided. The method includes a step of performing a nested qPCR assay to a specimen. The nested qPCR assay includes a first round of amplification using external primers and a second round of amplification using internal primers and a probe. The external primers have sequences of SEQ ID NOs. 1 and 2, and the internal primers and the probe have sequences of SEQ ID NOs. 3 to 5.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: April 23, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yi-Chen Li, Chih-Cheng Tsou, Min-Hsien Wu, Hsin-Yao Wang, Chien-Ru Lin
  • Patent number: 11966352
    Abstract: An information handling system with modular riser components for receiving expansion cards having various requirements. The system includes a riser body assembly having a common support structure for receiving expansion cards. The common support structure may be coupled to different expansion structures to provide support of expansion cards having requirements that would not be met by the common support structure alone.
    Type: Grant
    Filed: October 8, 2020
    Date of Patent: April 23, 2024
    Assignee: Dell Products L.P.
    Inventors: Yu-Feng Lin, Hao-Cheng Ku, Yi-Wei Lu
  • Publication number: 20240124163
    Abstract: A magnetic multi-pole propulsion array system is applied to at least one external cathode and includes a plurality of magnetic multi-pole thrusters connected adjacent to each other. Each magnetic multi-pole thruster includes a propellant provider, a discharge chamber, an anode and a plurality of magnetic components. The propellant provider outputs propellant. The discharge chamber is connected with the propellant provider to accommodate the propellant. The anode is disposed inside the discharge chamber to generate an electric field. The plurality of magnetic components is respectively disposed on several sides of the discharge chamber. One of the several sides of the discharge chamber of the magnetic multi-pole thruster is applied for one side of a discharge chamber of another magnetic multi-pole thruster.
    Type: Application
    Filed: December 19, 2022
    Publication date: April 18, 2024
    Applicant: National Cheng Kung University
    Inventors: Yueh-Heng Li, Yu-Ting Wu, Chao-Wei Huang, Wei-Cheng Lo, Hsun-Chen Hsieh, Ping-Han Huang, Yi-Long Huang, Sheng-Wen Liu, Wei-Cheng Lien
  • Publication number: 20240127765
    Abstract: Disclosed are a display device and a backlight control method for the display device. The display device includes a display panel, a backlight source, a first computing unit, and a second computing unit. The display panel includes a first display region and a second display region. The first light-emitting region corresponds to the first display region. The second light-emitting region corresponds to the second display region. The first computing unit calculates a first brightness distribution within a first range. The second computing unit calculates a second brightness distribution within a second range. The first light-emitting region emits light according to the first brightness distribution. The second light-emitting region emits light according to the second brightness distribution.
    Type: Application
    Filed: September 11, 2023
    Publication date: April 18, 2024
    Applicants: Innolux Corporation, CARUX TECHNOLOGY PTE. LTD.
    Inventors: Yi-Cheng Chang, Yu-Ming Wu
  • Publication number: 20240126633
    Abstract: A method for responding to a command is adapted for a storage device. The method for responding to a command includes following steps of: sequentially receiving a first command and a second command by a bridge of the storage device from a host; executing the first command and the second command to generate a status completion signal or a status error signal by the bridge; and detecting an error state of at least one of the first command and the second command to execute a response mode or an idle mode by the bridge according to the error state so as to respond to the host.
    Type: Application
    Filed: August 14, 2023
    Publication date: April 18, 2024
    Inventors: Yi Cheng TSAI, Sung-Kao LIU, Cheng-Yuan HSIAO, Po-Hao CHEN
  • Publication number: 20240128378
    Abstract: A semiconductor device includes a first transistor and a protection structure. The first transistor includes a gate electrode, a gate dielectric disposed on the gate electrode, and a channel layer disposed on the gate dielectric. The protection structure is laterally surrounding the gate electrode, the gate dielectric and the channel layer of the first transistor. The protection structure includes a first capping layer and a dielectric portion. The first capping layer is laterally surrounding and contacting the gate electrode, the gate dielectric and the channel layer of the first transistor. The dielectric portion is disposed on the first capping layer and laterally surrounding the first transistor.
    Type: Application
    Filed: January 30, 2023
    Publication date: April 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Cheng Chu, Chien-Hua Huang, Yu-Ming Lin, Chung-Te Lin
  • Patent number: D1023935
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: April 23, 2024
    Assignee: Acer Incorporated
    Inventors: Ya-Hao Chan, Yi-Heng Lee, Ming-Cheng Wu, Chun-Yu Chen