Abstract: The present disclosure provides an optical identification module and a display panel. The optical identification module includes a substrate, an identification structure and a collimation optical path structure, where the identification structure is arranged on the substrate, the collimation optical path structure is arranged on a light entering side of the identification structure, the optical identification module further includes a non-visible light filtering structure, and the non-visible light filtering structure is arranged in the collimation optical path structure and configured to filter non-visible light irradiated to the identification structure.

Abstract: The embodiment of the present disclosure discloses a display apparatus. A flexible optical fingerprint recognition component is obtained by arrangement of a flexible substrate, a flexible fingerprint recognition element and a flexible collimation structure to implement flexible foldable display. In addition, the flexible fingerprint recognition element includes a first flexible fingerprint recognition element and a second flexible fingerprint recognition element which are mutually independent, the first flexible fingerprint recognition element corresponds to a first non-bending area of the flexible display module, the second flexible fingerprint recognition element corresponds to a second non-bending area of the flexible display module, and a non-fingerprint recognition area corresponding to the bending area is provided between the first flexible fingerprint recognition element and the second flexible fingerprint recognition element.

Abstract: A fingerprint acquisition apparatus includes a plurality of photoelectric conversion units and a first shading pattern. The first shading pattern includes at least one first shading block including a first opening, and an orthographic projection of the first opening in the first shading block on the base substrate is within an orthographic projection of a target photoelectric conversion unit corresponding to the first shading block on the base substrate.

Abstract: Provided a fingerprint identification substrate and a manufacturing method therefor, a identification method, and a display apparatus. The fingerprint identification substrate includes a substrate and at least two kinds of identification pixels disposed on the substrate, a first identification pixel includes a first photodiode and a second identification pixel includes a second photodiode. The first photodiode includes a first electrode, a first photoelectric conversion layer and a second electrode, the second photodiode includes the first electrode, a second photoelectric conversion layer and the second electrode, and the first photoelectric conversion layer and the second photoelectric conversion layer have different spectral response characteristics to red light or infrared light.

Abstract: This invention discloses a hierarchical switching fabric and deadlock avoidance method for ultra high radix network routers. The hierarchical switching fabric comprises a network-on-chip and K multi-port components. The multi-port component comprises a port module configured to receive packets by a high speed serializer/deserializer, code and format the packets, send the packets to a corresponding hyper packet module after coding and format conversion, and send the packets sent by the hyper packet module to the network; and the hyper packet module configured to perform protocol processing for the received data link level packets, discard illegal packets, forward legitimate packets to the network-on-chip, perform data error correcting, format conversion and channel mapping for the packets received from the network-on-chip, and send the packets to the corresponding port module.

Abstract: Ranking system metrics for monitoring by sorting members of a set of system metrics into correlation groups according to correlations among historic time series data, determining a sensitivity of the members of the set of system metrics, determining an importance of the members of the set of system metrics according to the correlation groups and sensitivity, and ranking the members of the set of system metrics according to the importance.

Abstract: Ranking system metrics for monitoring by sorting members of a set of system metrics into correlation groups according to correlations among historic time series data, determining a sensitivity of the members of the set of system metrics, determining an importance of the members of the set of system metrics according to the correlation groups and sensitivity, and ranking the members of the set of system metrics according to the importance.

Abstract: This invention discloses a multimode interconnection interface controller for a converged network, which comprises a SERDES element responsible for serial/parallel conversion, a LANE_TXCLK element responsible for generating a transmit clock, a SERDES initialization element responsible for link training and rate negotiation, and a PCS_EB coding element and an PCS_AF coding element responsible for physical layer coding of messages. The link training and rate negotiation are completed automatically via the shared SERDES initialization element. More universality and flexibility are provided for interconnection chip design by the PCS_EB coding element. The PCS_AF coding element is provided to reduce message penetration delay. The multimode interconnection interface controller is integrated in a single chip. Through flexible configuration, the single chip can meet transmission requirements of dedicated high speed networks and Ethernet networks.

Abstract: Embodiments of the present invention provide systems and methods for remote query optimization in multi data sources. The method includes receiving a database query from a remote source requesting data-points from multiple data sources. The method further includes receiving and analyzing the data-points, creating a data set based on the analysis, and transmitting the data set to the remote source.

Abstract: This invention discloses a multimode interconnection interface controller for a converged network, which comprises a SERDES element responsible for serial/parallel conversion, a LANE_TXCLK element responsible for generating a transmit clock, a SERDES initialization element responsible for link training and rate negotiation, and a PCS_EB coding element and an PCS_AF coding element responsible for physical layer coding of messages. The link training and rate negotiation are completed automatically via the shared SERDES initialization element. More universality and flexibility are provided for interconnection chip design by the PCS_EB coding element. The PCS_AF coding element is provided to reduce message penetration delay. The multimode interconnection interface controller is integrated in a single chip. Through flexible configuration, the single chip can meet transmission requirements of dedicated high speed networks and Ethernet networks.

Abstract: This invention discloses a hierarchical switching fabric and deadlock avoidance method for ultra high radix network routers. The hierarchical switching fabric comprises a network-on-chip and K multi-port components. The multi-port component comprises a port module configured to receive packets by a high speed serializer/deserializer, code and format the packets, send the packets to a corresponding hyper packet module after coding and format conversion, and send the packets sent by the hyper packet module to the network; and the hyper packet module configured to perform protocol processing for the received data link level packets, discard illegal packets, forward legitimate packets to the network-on-chip, perform data error correcting, format conversion and channel mapping for the packets received from the network-on-chip, and send the packets to the corresponding port module.