Patents by Inventor Yi-Fam Shiu
Yi-Fam Shiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240162071Abstract: A multiple die container load port may include a housing with an opening, and an elevator to accommodate a plurality of different sized die containers. The multiple die container load port may include a stage supported by the housing and moveable within the opening of the housing by the elevator. The stage may include one or more positioning mechanisms to facilitate positioning of the plurality of different sized die containers on the stage, and may include different portions movable by the elevator to accommodate the plurality of different sized die containers. The multiple die container load port may include a position sensor to identify one of the plurality of different sized die containers positioned on the stage.Type: ApplicationFiled: January 19, 2024Publication date: May 16, 2024Inventors: Chih-Hung HUANG, Cheng-Lung WU, Yi-Fam SHIU, Yu-Chen CHEN, Yang-Ann CHU, Jiun-Rong PAI
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Patent number: 11972971Abstract: A wafer lift pin system is capable of dynamically modulating or adjusting the flow of gas into and out of lift pins of the wafer lift pin system to achieve and maintain a consistent pressure in supply lines that supply the gas to the lift pins. This enables the wafer lift pin system to precisely control the speed, acceleration, and deceleration of the lift pins to achieve consistent and repeatable lift pin rise times and fall times. A controller and various sensors and valves may control the gas pressures in the wafer lift pin system based on various factors, such as historic rise times, historic fall times, and/or the condition of the lift pins. This enables smoother and more controlled automatic operation of the lift pins, which reduces and/or minimizes wafer shifting and wafer instability, which may reduce processing defects and maintain or improve processing yields.Type: GrantFiled: March 5, 2021Date of Patent: April 30, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Chen Chen, Yi-Fam Shiu, Cheng-Lung Wu, Yang-Ann Chu, Jiun-Rong Pai
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Patent number: 11923225Abstract: A method includes initiating a gas flow of a first gas parallel to a wall of an interface module to create an air curtain across an opening defined in the wall. The method includes moving an interface door to reveal the opening, wherein the air curtain restrains a second gas within the interface module from passing through the opening. The method includes transferring a semiconductor wafer through the opening and moving the interface door to cover the opening. The method includes halting the gas flow of the first gas after moving the interface door to cover the opening.Type: GrantFiled: August 16, 2021Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITEDInventors: Yi-Fam Shiu, Cheng-Lung Wu, Yang-Ann Chu, Hsu-Shui Liu, Jiun-Rong Pai
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Patent number: 11915957Abstract: A multiple die container load port may include a housing with an opening, and an elevator to accommodate a plurality of different sized die containers. The multiple die container load port may include a stage supported by the housing and moveable within the opening of the housing by the elevator. The stage may include one or more positioning mechanisms to facilitate positioning of the plurality of different sized die containers on the stage, and may include different portions movable by the elevator to accommodate the plurality of different sized die containers. The multiple die container load port may include a position sensor to identify one of the plurality of different sized die containers positioned on the stage.Type: GrantFiled: January 7, 2022Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hung Huang, Cheng-Lung Wu, Yi-Fam Shiu, Yu-Chen Chen, Yang-Ann Chu, Jiun-Rong Pai
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Publication number: 20230386877Abstract: A system comprises a front opening universal pod (FOUP) configured to hold one or more semiconductor wafers and a load dock having a stage and a receiving portion extending above the stage. The FOUP is positioned on the stage. A fan filter unit (FFU) positioned above the load dock. An air flow optimizer device is disposed on the receiving portion and under the FFU. The air flow optimizer device has an inlet opening and an outlet opening and a channel extends between the inlet opening and the outlet opening.Type: ApplicationFiled: July 25, 2023Publication date: November 30, 2023Inventors: Yi-Fam Shiu, Cheng-Lung Wu, Yang-Ann Chu, Hsu-Shui Liu, Jiun-Rong Pai
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Publication number: 20230372983Abstract: A cleaning apparatus, method, and dry chamber are provided for cleaning a wafer carrier that holds wafers as part of a semiconductor fabrication process. The cleaning apparatus includes a wet chamber that receives the wafer carrier to be washed and a reservoir in fluid communication with the wet chamber. The reservoir stores a cleaning liquid that is introduced to the wafer carrier within the wet chamber during a washing operation, and a dry chamber is spaced apart from the wet chamber. The dry chamber receives the wafer carrier after the wafer carrier is washed in the wet chamber and holds the wafer carrier during a drying operation. A transport system transports the wafer carrier between the wet chamber and the dry chamber during a cleaning process.Type: ApplicationFiled: August 8, 2023Publication date: November 23, 2023Inventors: Eason CHEN, Yi-Fam SHIU, Sung-Chun YANG, Hsu-Shui LIU, Yang-Ann CHU, Jiun-Rong PAI
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Publication number: 20230375947Abstract: Some implementations described herein include operating components in a lithography system at variable speeds to reduce, minimize, and/or prevent particle generation due to rubbing of or collision between contact parts of the components. In some implementations, a component in a path of transfer of a semiconductor substrate in the lithography system is operated at a relatively high movement speed through a first portion of an actuation operation, and is operated at a reduced movement speed (e.g., a movement speed that is less than the high movement speed) through a second portion of the actuation operation in which contact parts of the component are to interact. The reduced movement speed reduces the likelihood of particle generation and/or release from the contact parts when the contact parts interact, while the high movement speed provides a high semiconductor substrate throughput in the lithography system.Type: ApplicationFiled: July 31, 2023Publication date: November 23, 2023Inventors: Shao-Hua WANG, Kueilin HO, Cheng Wei SUN, Zong-You YANG, Chih-Chun CHIANG, Yi-Fam SHIU, Chueh-Chi KUO, Heng-Hsin LIU, Li-Jui CHEN
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Patent number: 11820607Abstract: In certain embodiments, a system includes: a source lane configured to move a first die container between a load port and a source lane staging area; an inspection sensor configured to produce a sensor result based on a die on the first die container; a pass target lane configured to move a second die container between a pass target lane out port and a pass target lane staging area; a fail target lane configured to move a third die container between a fail target lane out port and a fail target lane staging area; and a conveyor configured to move the die from the first die container at the source lane staging area to either the second die container at the pass target lane staging area or the fail target lane staging area based on the sensor result.Type: GrantFiled: August 9, 2022Date of Patent: November 21, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tsung-Sheng Kuo, Chih-Hung Huang, Yi-Fam Shiu, Chueng-Jen Wang, Hsuan Lee, Jiun-Rong Pai
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Publication number: 20230369082Abstract: The present disclosure provides an embodiment of a semiconductor fabrication system. The semiconductor fabrication system includes an equipment front end module with a load port to transfer semiconductor wafers to the equipment front end module from a wafer carrier; and a wafer humidity control device embedded in the equipment front end module and configured to generate an air curtain to protect the semiconductor wafers. The wafer humidity control device further includes a gas entry layer with a gas inlet to receive a gas; a uniform layer integrated with the gas entry layer and designed to redistribute the gas; and a diversion structure having multiple pieces assembled together to hold the uniform layer and integrated with the gas entry layer.Type: ApplicationFiled: August 10, 2022Publication date: November 16, 2023Inventors: Cheng-Lung Wu, Yi-Fam Shiu, Yang-Ann Chu, Hsu-Shui Liu
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Patent number: 11813649Abstract: A cleaning apparatus, method, and dry chamber are provided for cleaning a wafer carrier that holds wafers as part of a semiconductor fabrication process. The cleaning apparatus includes a wet chamber that receives the wafer carrier to be washed and a reservoir in fluid communication with the wet chamber. The reservoir stores a cleaning liquid that is introduced to the wafer carrier within the wet chamber during a washing operation, and a dry chamber is spaced apart from the wet chamber. The dry chamber receives the wafer carrier after the wafer carrier is washed in the wet chamber and holds the wafer carrier during a drying operation. A transport system transports the wafer carrier between the wet chamber and the dry chamber during a cleaning process.Type: GrantFiled: May 29, 2020Date of Patent: November 14, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITEDInventors: Eason Chen, Yi-Fam Shiu, Sung-Chun Yang, Hsu-Shui Liu, Yang-Ann Chu, Jiun-Rong Pai
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Patent number: 11803129Abstract: Some implementations described herein include operating components in a lithography system at variable speeds to reduce, minimize, and/or prevent particle generation due to rubbing of or collision between contact parts of the components. In some implementations, a component in a path of transfer of a semiconductor substrate in the lithography system is operated at a relatively high movement speed through a first portion of an actuation operation, and is operated at a reduced movement speed (e.g., a movement speed that is less than the high movement speed) through a second portion of the actuation operation in which contact parts of the component are to interact. The reduced movement speed reduces the likelihood of particle generation and/or release from the contact parts when the contact parts interact, while the high movement speed provides a high semiconductor substrate throughput in the lithography system.Type: GrantFiled: May 11, 2022Date of Patent: October 31, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shao-Hua Wang, Kueilin Ho, Cheng Wei Sun, Zong-You Yang, Chih-Chun Chiang, Yi-Fam Shiu, Chueh-Chi Kuo, Heng-Hsin Liu, Li-Jui Chen
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Patent number: 11786947Abstract: A cleaning apparatus, method, and dry chamber are provided for cleaning a wafer carrier that holds wafers as part of a semiconductor fabrication process. The cleaning apparatus includes a wet chamber that receives the wafer carrier to be washed and a reservoir in fluid communication with the wet chamber. The reservoir stores a cleaning liquid that is introduced to the wafer carrier within the wet chamber during a washing operation, and a dry chamber is spaced apart from the wet chamber. The dry chamber receives the wafer carrier after the wafer carrier is washed in the wet chamber and holds the wafer carrier during a drying operation. A transport system transports the wafer carrier between the wet chamber and the dry chamber during a cleaning process.Type: GrantFiled: July 27, 2022Date of Patent: October 17, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITEDInventors: Eason Chen, Yi-Fam Shiu, Sung-Chun Yang, Hsu-Shui Liu, Yang-Ann Chu, Jiun-Rong Pai
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Publication number: 20230317505Abstract: In an embodiment, a system includes: a tool port of a semiconductor processing tool; a processing port with an internal processing port location and an external processing port location; a robot configured to move a die vessel between the internal processing port location and the tool port; and an actuator configured to move the die vessel between the internal processing port location and the external processing port location.Type: ApplicationFiled: June 6, 2023Publication date: October 5, 2023Inventors: Tsung-Sheng KUO, Yi-Fam SHIU, Eason CHEN, Yang-Ann CHU, Jiun-Rong PAI
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Patent number: 11735455Abstract: A system comprises a front opening universal pod (FOUP) configured to hold one or more semiconductor wafers and a load dock having a stage and a receiving portion extending above the stage. The FOUP is positioned on the stage. A fan filter unit (FFU) positioned above the load dock. An air flow optimizer device is disposed on the receiving portion and under the FFU. The air flow optimizer device has an inlet opening and an outlet opening and a channel extends between the inlet opening and the outlet opening.Type: GrantFiled: September 2, 2021Date of Patent: August 22, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yi-Fam Shiu, Cheng-Lung Wu, Yang-Ann Chu, Hsu-Shui Liu, Jiun-Rong Pai
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Patent number: 11705358Abstract: In an embodiment, a system includes: a tool port of a semiconductor processing tool; a processing port with an internal processing port location and an external processing port location; a robot configured to move a die vessel between the internal processing port location and the tool port; and an actuator configured to move the die vessel between the internal processing port location and the external processing port location.Type: GrantFiled: September 30, 2019Date of Patent: July 18, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tsung-Sheng Kuo, Yi-Fam Shiu, Eason Chen, Yang-Ann Chu, Jiun-Rong Pai
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Publication number: 20230207359Abstract: A load port receives a wafer carrier. An equipment front end module (EFEM) transfers semiconductor wafers to and from the wafer carrier via an access opening of a housing of the EFEM, and also transfers wafers to and from a semiconductor processing or characterization tool. A gas flow device disposed inside the housing of the EFEM is connected to receive a low humidity gas having relative humidity of 10% or less, and is positioned to flow the received low humidity gas across the access opening. A saturated pressure layer of the gas flow device has a permeability for the low humidity gas that increases with increasing distance from a gas inlet edge of the saturated pressure layer, for example due to holes of varying diameter and/or density passing through the saturated pressure layer. A filter layer of the gas flow device uniformizes the gas exiting the saturated pressure layer.Type: ApplicationFiled: February 24, 2022Publication date: June 29, 2023Inventors: Ren-Hau Wu, Cheng-Kang Hu, Yi-Fam Shiu, Cheng-Lung Wu, Hsu-Shui Liu
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Publication number: 20230154778Abstract: The present disclosure relates to systems and methods for reducing the humidity within a FOUP (Front Opening Unified Pod) when loaded on an EFEM (Equipment Front End Module) for transfer of a semiconductor wafer substrate during fabrication processes. A deflector of specified structure is placed inside the EFEM above the load port of the FOUP. The deflector directs airflow in the EFEM away from the load port. The deflector includes a body with a plurality of apertures in the deflector body, and with a sloped front surface. Thus, the degree of penetration of high-humidity air from the EFEM into the FOUP is reduced.Type: ApplicationFiled: March 7, 2022Publication date: May 18, 2023Inventors: Sung-Ju Huang, Kuang-Wei Cheng, Cheng-Lung Wu, Yi-Fam Shiu, Chyi-Tsong Ni
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Publication number: 20230046032Abstract: Some implementations described herein include operating components in a lithography system at variable speeds to reduce, minimize, and/or prevent particle generation due to rubbing of or collision between contact parts of the components. In some implementations, a component in a path of transfer of a semiconductor substrate in the lithography system is operated at a relatively high movement speed through a first portion of an actuation operation, and is operated at a reduced movement speed (e.g., a movement speed that is less than the high movement speed) through a second portion of the actuation operation in which contact parts of the component are to interact. The reduced movement speed reduces the likelihood of particle generation and/or release from the contact parts when the contact parts interact, while the high movement speed provides a high semiconductor substrate throughput in the lithography system.Type: ApplicationFiled: May 11, 2022Publication date: February 16, 2023Inventors: Shao-Hua WANG, Kueilin HO, Cheng Wei SUN, Zong-You YANG, Chih-Chun CHIANG, Yi-Fam SHIU, Chueh-Chi KUO, Heng-Hsin LIU, Li-Jui CHEN
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Publication number: 20230039611Abstract: A system includes a loader tool to load a plate to which a sandpaper sheet is to be affixed to a surface of the plate. The system includes a sandpaper affixing tool to remove a liner from the sandpaper sheet to expose an adhesive surface of the sandpaper sheet, and to affix the sandpaper sheet to the surface of the plate using the adhesive surface of the sandpaper sheet. The system includes a flatness detector to determine whether a surface of the sandpaper sheet is sufficiently flat after the sandpaper sheet is affixed to the surface of the plate. The system includes an unloader tool to store the plate after the sandpaper sheet is affixed to the surface of the plate.Type: ApplicationFiled: August 6, 2021Publication date: February 9, 2023Inventors: Yi-Fam SHIU, Cheng-Chao TSAI, Cheng-Lung WU, Chih-Hung HUANG, Jiun-Rong PAI
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Publication number: 20220384222Abstract: In certain embodiments, a system includes: a source lane configured to move a first die container between a load port and a source lane staging area; an inspection sensor configured to produce a sensor result based on a die on the first die container; a pass target lane configured to move a second die container between a pass target lane out port and a pass target lane staging area; a fail target lane configured to move a third die container between a fail target lane out port and a fail target lane staging area; and a conveyor configured to move the die from the first die container at the source lane staging area to either the second die container at the pass target lane staging area or the fail target lane staging area based on the sensor result.Type: ApplicationFiled: August 9, 2022Publication date: December 1, 2022Inventors: Tsung-Sheng KUO, Chih-Hung HUANG, Yi-Fam SHIU, Chueng-Jen WANG, Hsuan LEE, Jiun-Rong PAI