Abstract: An identity certificate may be issued to a blockchain node. The issuance may include issuing a first identity certificate to a first terminal and receiving a second identity certificate issuance request that is from the first terminal. A second identity certificate may be issued to the first terminal, and a third identity certificate issuance request is received from the second terminal. A third identity certificate is issued to the second terminal, so that the second terminal forwards the third identity certificate to the third terminal.

Abstract: Provided are a computer program product, system, and method for training and using a vector encoder to determine vectors for sub-images of text in an image to subject to optical character recognition. A vector encoder is trained to encode images representing text into vectors in a vector space. Vectors of images representing similar text have a high degree of cohesion in the vector space. Vectors of images representing dissimilar text have a low degree of cohesion in the vector space. An input image is processed to determine sub-images of the input image that bound text represented in the input image. The sub-images are inputted to the vector encoder to output sub-image vectors. The vector encoder generates a search vector for search text. Optical character recognition is applied to at least one region of the input image including the sub-images having sub-image vectors matching the search vector.

Abstract: In order to prevent formation of voids in STI film, after a second buried insulating layer is filled and planarized, a high density cap is formed embedded in the center region of the second buried insulating layer of the STI trench. The high density cap shields and protects the weaker center region of the second buried insulating layer of the STI trench from the subsequent processing steps and prevents formation of voids in the second buried insulating layer.

Abstract: A method for forming a semiconductor device is provided. The method includes forming a dielectric layer over a semiconductor substrate and forming a contact plug in the dielectric layer. The method also includes partially removing the contact plug to form a recess over the contact plug. The method further includes forming a capacitor element in the recess.

Abstract: A method includes a patterned hard mask layer formed over a substrate. The substrate is etched using the patterned hard mask layer to form a trench therein but leaving at least one elongated portion of the substrate inside the trench. A first isolation layer is formed over the patterned hard mask layer. The first isolation layer fills the trench and covers the at least one elongated portion of the substrate. A portion of the first isolation layer is removed to expose the at least one elongated portion of the substrate. The at least one elongated portion of the substrate is thereafter removed to form a first opening. A second isolation layer is formed over the first opening, the patterned hard mask layer, and the first isolation layer, the second isolation layer sealing the first opening to form an air gap.

Abstract: A method includes a patterned hard mask layer formed over a substrate. The substrate is etched using the patterned hard mask layer to form a trench therein but leaving at least one elongated portion of the substrate inside the trench. A first isolation layer is formed over the patterned hard mask layer. The first isolation layer fills the trench and covers the at least one elongated portion of the substrate. A portion of the first isolation layer is removed to expose the at least one elongated portion of the substrate. The at least one elongated portion of the substrate is thereafter removed to form a first opening. A second isolation layer is formed over the first opening, the patterned hard mask layer, and the first isolation layer, the second isolation layer sealing the first opening to form an air gap.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure includes a gate stack over the semiconductor substrate. The semiconductor device structure includes spacers over opposite sidewalls of the gate stack. The spacers and the gate stack surround a recess over the gate stack. The semiconductor device structure includes a first insulating layer over the gate stack and an inner wall of the recess. The semiconductor device structure includes a second insulating layer over the first insulating layer. Materials of the first insulating layer and the second insulating layer are different, and a first thickness of the first insulating layer is less than a second thickness of the second insulating layer.

Abstract: A method for forming a semiconductor device is provided. The method includes forming a dielectric layer over a semiconductor substrate and forming a contact plug in the dielectric layer. The method also includes partially removing the contact plug to form a recess over the contact plug. The method further includes forming a capacitor element in the recess.

Abstract: A structure and a formation method of a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a dielectric layer over the semiconductor substrate. The semiconductor device also includes a contact plug in the dielectric layer, and a recess extending from a surface of the dielectric layer towards the contact plug. The semiconductor device further includes a capacitor element in the recess and electrically connected to the contact plug.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate. The semiconductor device structure includes a gate stack over the semiconductor substrate. The semiconductor device structure includes spacers over opposite sidewalls of the gate stack. The spacers and the gate stack surround a recess over the gate stack. The semiconductor device structure includes a first insulating layer over the gate stack and an inner wall of the recess. The semiconductor device structure includes a second insulating layer over the first insulating layer. Materials of the first insulating layer and the second insulating layer are different, and a first thickness of the first insulating layer is less than a second thickness of the second insulating layer.

Abstract: The present disclosure provides a semiconductor structure, including a substrate, a metal gate, a dielectric layer, and an etch stop layer. The metal gate is positioned on the substrate and possesses a first surface. The dielectric layer surrounds the metal gate and possesses a second surface. The etch stop layer is in contact with both the first surface and the second surface. The first surface is higher than the second surface. The present disclosure also provides a method for manufacturing a semiconductor structure, including forming a dummy gate on a substrate; forming a second etch stop layer over the dummy gate; forming a dielectric layer over the dummy gate; replacing the dummy gate with a metal gate; etching back the dielectric layer to form a second surface of the dielectric layer lower than a first surface of the metal gate; and forming a first etch stop layer over the metal gate and the dielectric layer.

Abstract: A method includes a patterned hard mask layer formed over a substrate. The substrate is etched using the patterned hard mask layer to form a trench therein but leaving at least one elongated portion of the substrate inside the trench. A first isolation layer is formed over the patterned hard mask layer. The first isolation layer fills the trench and covers the at least one elongated portion of the substrate. A portion of the first isolation layer is removed to expose the at least one elongated portion of the substrate. The at least one elongated portion of the substrate is thereafter removed to form a first opening. A second isolation layer is formed over the first opening, the patterned hard mask layer, and the first isolation layer, the second isolation layer sealing the first opening to form an air gap.

Abstract: A structure and a formation method of a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a dielectric layer over the semiconductor substrate. The semiconductor device also includes a contact plug in the dielectric layer, and a recess extending from a surface of the dielectric layer towards the contact plug. The semiconductor device further includes a capacitor element in the recess and electrically connected to the contact plug.

Abstract: A semiconductor structure includes a semiconductor substrate, a dielectric layer formed over the semiconductor substrate, a first anti-etch layer, a second anti-etch layer and a conductive material. The dielectric layer has an opening. The first anti-etch layer is formed on the sidewall of the opening and made of a material having resistance to peroxide. The second anti-etch layer is formed over the first anti-etch layer and made of a material having resistance to acid. The conductive material is formed within the opening and in contact with the second anti-etch layer.

Abstract: A semiconductor structure includes a semiconductor substrate, a dielectric layer formed over the semiconductor substrate, a first anti-etch layer, a second anti-etch layer and a conductive material. The dielectric layer has an opening. The first anti-etch layer is formed on the sidewall of the opening and made of a material having resistance to peroxide. The second anti-etch layer is formed over the first anti-etch layer and made of a material having resistance to acid. The conductive material is formed within the opening and in contact with the second anti-etch layer.

Abstract: The present disclosure provides a semiconductor structure, including a substrate, a metal gate, a dielectric layer, and an etch stop layer. The metal gate is positioned on the substrate and possesses a first surface. The dielectric layer surrounds the metal gate and possesses a second surface. The etch stop layer is in contact with both the first surface and the second surface. The first surface is higher than the second surface. The present disclosure also provides a method for manufacturing a semiconductor structure, including forming a dummy gate on a substrate; forming a second etch stop layer over the dummy gate; forming a dielectric layer over the dummy gate; replacing the dummy gate with a metal gate; etching back the dielectric layer to form a second surface of the dielectric layer lower than a first surface of the metal gate; and forming a first etch stop layer over the metal gate and the dielectric layer.

Abstract: The description relates to a method of patterning a semiconductor device to create a through substrate via. The method produces a through substrate via having no photoresist material therein. An intermediate layer deposited over an interlayer dielectric prevents etching solutions from etching interlayer dielectric sidewalls to prevent peeling. The description relates to a semiconductor apparatus including a semiconductor substrate having a through substrate via therein. The semiconductor apparatus further includes an interlayer dielectric over the semiconductor substrate and an intermediate layer over semiconductor substrate and over sidewalls of the interlayer dielectric.

Abstract: An automatic measurement system for plant features includes: at least one photographic device, for photographing a plant in a container, so as to generate a top view image and a side view image; and an operation processing device, electrically connected to the photographic devices, and at least including an image processing module and a storage unit. The image processing module analyzes at least one of the top view image and the side view image by using at least one image processing procedure and at least one analysis rule, so as to generate at least one feature data corresponding to appearance features of the plant, and records the at least one feature data in the storage unit.

Abstract: In order to prevent formation of voids in STI film, after a second buried insulating layer is filled and planarized, a high density cap is formed embedded in the center region of the second buried insulating layer of the STI trench. The high density cap shields and protects the weaker center region of the second buried insulating layer of the STI trench from the subsequent processing steps and prevents formation of voids in the second buried insulating layer.

Abstract: The description relates to a method of patterning a semiconductor device to create a through substrate via. The method produces a through substrate via having no photoresist material therein. An intermediate layer deposited over an interlayer dielectric prevents etching solutions from etching interlayer dielectric sidewalls to prevent peeling. The description relates to a semiconductor apparatus including a semiconductor substrate having a through substrate via therein. The semiconductor apparatus further includes an interlayer dielectric over the semiconductor substrate and an intermediate layer over semiconductor substrate and over sidewalls of the interlayer dielectric.