Abstract: A semiconductor structure includes a first device and a second device. The first device includes: a first gate structure formed over an active region and a first air spacer disposed adjacent to the first gate structure. The second device includes: a second gate structure formed over an isolation structure and a second air spacer disposed adjacent to the second gate structure. The first air spacer and the second air spacer have different sizes.

Abstract: A method includes forming a first fin and a second fin protruding from a frontside of a substrate, forming a gate stack over the first and second fins, forming a dielectric feature dividing the gate stack into a first segment engaging the first fin and a second segment engaging the second fin, and growing a first epitaxial feature on the first fin and a second epitaxial feature on the second fin. The dielectric feature is disposed between the first and second epitaxial features. The method also includes performing an etching process on a backside of the substrate to form a backside trench, and forming a backside via in the backside trench. The backside trench exposes the dielectric feature and the first and second epitaxial features. The backside via straddles the dielectric feature and is in electrical connection with the first and second epitaxial features.

Abstract: In a method of forming a pattern over a semiconductor substrate, a target layer to be patterned is formed over a substrate, a mask pattern including an opening is formed in a mask layer, a shifting film is formed in an inner sidewall of the opening, a one-directional etching operation is performed to remove a part of the shifting film and a part of the mask layer to form a shifted opening, and the target layer is patterned by using the mask layer with the shifted opening as an etching mask. A location of the shifted opening is laterally shifted from an original location of the opening.

Abstract: A semiconductor device includes a gate electrode, a gate insulating layer, an active layer, a source electrode and a drain electrode. The gate insulating layer is disposed between the gate electrode and the active layer, the source electrode and the drain electrode are arranged on one side of the gate insulating layer, wherein the gate insulating layer includes multilayer oxide films stacked on each other and at least one interface layer between the multilayer oxide films, and the material of the at least one interface layer is different from the material of the oxide films.

Abstract: An outlier IC detection method includes acquiring first measured data of a first IC set, training the first measured data for establishing a training model, acquiring second measured data of a second IC set, generating predicted data of the second IC set by using the training model according to the second measured data, generating a bivariate dataset distribution of the second IC set according to the predicted data and the second measured data, acquiring a predetermined Mahalanobis distance on the bivariate dataset distribution of the second IC set, and identifying at least one outlier IC from the second IC set when at least one position of the at least one outlier IC on the bivariate dataset distribution is outside a range of the predetermined Mahalanobis distance.

Abstract: A magnetic tunnel junction (MTJ) device includes two magnetic tunnel junction elements and a magnetic shielding layer. The two magnetic tunnel junction elements are arranged side by side. The magnetic shielding layer is disposed between the magnetic tunnel junction elements. A method of forming said magnetic tunnel junction (MTJ) device includes the following steps. An interlayer including a magnetic shielding layer is formed. The interlayer is etched to form recesses in the interlayer. The magnetic tunnel junction elements fill in the recesses. Or, a method of forming said magnetic tunnel junction (MTJ) device includes the following steps. A magnetic tunnel junction layer is formed. The magnetic tunnel junction layer is patterned to form magnetic tunnel junction elements. An interlayer including a magnetic shielding layer is formed between the magnetic tunnel junction elements.

Abstract: A heat dissipating system includes a wind tunnel, a first electronic element, and a second electronic element. The wind tunnel defines a top air inlet channel and a separated bottom, and a top air discharging channel and a separated bottom air discharging channel. Air entering the bottom air inlet channel dissipates heat produced by the first electronic element to the top air discharging channel, to flow out of the wind tunnel. Air entering the top air inlet channel flows to the bottom air discharging channel to dissipate heat produced by the second electronic element, this arrangement avoids heated air from one element being exhausted onto another element.

Abstract: A heat dissipating system includes a wind tunnel, a first electronic element, and a second electronic element. The wind tunnel defines a top air inlet channel and a separated bottom, and a top air discharging channel and a separated bottom air discharging channel. Air entering the bottom air inlet channel dissipates heat produced by the first electronic element to the top air discharging channel, to flow out of the wind tunnel. Air entering the top air inlet channel flows to the bottom air discharging channel to dissipate heat produced by the second electronic element, this arrangement avoids heated air from one element being exhausted onto another element.

Abstract: A vibrating diaphragm includes a diaphragm body and a suspension edge. The diaphragm body is made by acrylonitrile butadiene styrene materials. A surface of the diaphragm body is electroplated a layer of nanoscale materials. The suspension edge is made by room temperature vulcanized silicone rubber materials. The suspension edge is molded an outer periphery of the diaphragm body. The vibrating diaphragm can improve the high frequency effect of the speaker.

Abstract: A vibrating diaphragm includes a diaphragm body and a suspension edge. The diaphragm body is made by acrylonitrile butadiene styrene materials. A surface of the diaphragm body is electroplated a layer of nanoscale materials. The suspension edge is made by room temperature vulcanized silicone rubber materials. The suspension edge is molded an outer periphery of the diaphragm body. The vibrating diaphragm can improve the high frequency effect of the speaker.

Abstract: A vibrating diaphragm includes a diaphragm body and a suspension edge. The diaphragm body is made by acrylonitrile butadiene styrene materials. A surface of the diaphragm body is electroplated a layer of nanoscale materials. The suspension edge is made by room temperature vulcanized silicone rubber materials. The suspension edge is molded an outer periphery of the diaphragm body. The vibrating diaphragm can improve the high frequency effect of the speaker.

Abstract: A server chassis having a low-profile characteristic is disclosed to include a chassis shell, which defines an accommodation chamber that accommodates an electronic device and a motherboard, a fan module located on one open side of the accommodation chamber in the chassis shell and defining a mounting space in the accommodation chamber, and a connector module, which includes a housing movable in and out of the mounting space inside the chassis shell and locked to the chassis shell with screws, a plurality of peripheral apparatuses carried in the housing of the connector module and an adapter board mounted on the rear side of the housing for the connection of the electronic device, the electric fans and the peripheral apparatuses.

Abstract: A manufacturing method of a charge-trapping memory device is provided. This method includes forming a stacked structure having at least a charge-trapping medium. An annealing process in a hydrogen gas is then performed on the stacked structure subsequent to the device fabrication process. The annealing process is conducted at a temperature of about 350° C. to 450° C. and with the concentration of the hydrogen gas greater than 0.5 mole percent.

Abstract: A method for treating fluoride-containing waste water is disclosed. The method includes, first, inducing fluoride-containing waste water and calcium compound into a crystallization reaction tank having a plurality of crystallizing webs so as to conduct a reaction between the fluoride-containing waste water and the calcium compound to form calcium fluoride crystals on the crystallizing webs; meanwhile, stirring the fluoride-containing waste water and the; then, discharging the fluoride-containing waste water out of the crystallization reaction tank for conducting a successive treating step.

Abstract: A decorative board includes two transparent surface layers spaced from each other, a transparent intermediate layer mounted between the surface layers, and a plurality of decorative members located in the intermediate layer. Thus, the surface layers and the intermediate layer are made of transparent material to expose the decorative members so that the decorative members are exposed from the two surface layers and the intermediate layer to enhance the aesthetic quality of the decorative board. In addition, the decorative members are encompassed by and hidden in the intermediate layer completely and are sandwiched between the two surface layers, so that the decorative members will not protrude outwardly from the two surface layers to facilitate a user clearing the decorative board.

Abstract: A manufacturing method of a charge-trapping memory device is provided. This method includes forming a stacked structure having at least a charge-trapping medium. An annealing process in a hydrogen gas is then performed on the stacked structure subsequent to the device fabrication process. The annealing process is conducted at a temperature of about 350° C. to 450° C. and with the concentration of the hydrogen gas greater than 0.5 mole percent.