Patents by Inventor Yi-Rong HO

Yi-Rong HO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Chip package and manufacturing method thereof
    Patent number: 11038077
    Abstract: A chip package includes a chip, a sidewall structure that has a first light-shielding layer, a second light-shielding layer, and a cover. The chip has a light emitter and a light receiver that are located on a top surface of the chip. The sidewall structure is located on the top surface of the chip and has two aperture areas. The light emitter and the light receiver are respectively located in the two aperture areas. The sidewall structure surrounds the light emitter and the light receiver, and at least one surface of the sidewall structure has the first light-shielding layer. The second light-shielding layer is located between the chip and the sidewall structure. The cover is located on a surface of the sidewall structure facing away from the chip, and at least covers the light receiver and the sidewall structure that surrounds the light receiver.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: June 15, 2021
    Assignee: XINTEC INC.
    Inventors: Yen-Shih Ho, Po-Han Lee, Chien-Min Lin, Yi-Rong Ho
  • CHIP PACKAGE AND MANUFACTURING METHOD THEREOF
    Publication number: 20190273175
    Abstract: A chip package includes a chip, a sidewall structure that has a first light-shielding layer, a second light-shielding layer, and a cover. The chip has a light emitter and a light receiver that are located on a top surface of the chip. The sidewall structure is located on the top surface of the chip and has two aperture areas. The light emitter and the light receiver are respectively located in the two aperture areas. The sidewall structure surrounds the light emitter and the light receiver, and at least one surface of the sidewall structure has the first light-shielding layer. The second light-shielding layer is located between the chip and the sidewall structure. The cover is located on a surface of the sidewall structure facing away from the chip, and at least covers the light receiver and the sidewall structure that surrounds the light receiver.
    Type: Application
    Filed: March 4, 2019
    Publication date: September 5, 2019
    Inventors: Yen-Shih HO, Po-Han LEE, Chien-Min LIN, Yi-Rong HO