Patents by Inventor Yi-shing LIN

Yi-shing LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240067740
    Abstract: The present disclosure provides antibodies and antibody fragments thereof that bind to human TNFR2. The disclosed antibodies, inhibit the TNF-TNFR2 signaling axis and enhance cytokine secretion in T effector cells and are therefore useful for the treatment of cancer, either alone or in combination with other agents.
    Type: Application
    Filed: December 30, 2021
    Publication date: February 29, 2024
    Inventors: Yi PEI, Haichun HUANG, Ming LEI, Han LI, Chi Shing SUM, Alla PRITSKER, Bor-Ruei LIN, Fangqiang TANG
  • Patent number: 11768786
    Abstract: A connection interface conversion chip, a connection interface conversion device and an operation method are provided. The connection interface conversion chip includes a USB interface circuit, a DP interface circuit, a USB core circuit and a switching circuit. The USB interface circuit is suitable for coupling to a USB connector. The DP interface circuit is coupled to a DP sink device through a DP connector. The USB core circuit is coupled to both the USB interface circuit and the DP interface circuit. The switching circuit is coupled to both the USB interface circuit and the DP interface circuit. The switching circuit supports only one specific conduction mode that only allows transmitting DP signals between the USB interface circuit and the DP interface circuit.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: September 26, 2023
    Assignee: VIA LABS, INC.
    Inventors: Cheng-Chung Lin, Hsiao-Chyi Lin, Yi-Shing Lin, Chien-Sheng Chen
  • Publication number: 20220352704
    Abstract: A protection circuit applied in a hub chip including a power pin, a first data pin, and a second data pin is provided. A voltage generation circuit generates and adjusts output voltage according to the voltage of the power pin and the voltage of the first data pin. A PMOS transistor includes a first gate, a first electrode, a second electrode, and a first bulk. The first electrode is coupled to the power pin. The second electrode is coupled to the first data pin. The first bulk receives the output voltage. A detection circuit is coupled to the first gate and detects the voltage of the power pin. In response to the voltage of the power pin being equal to the first voltage, the detection circuit transmits the voltage of the first data pin to the first gate.
    Type: Application
    Filed: August 25, 2021
    Publication date: November 3, 2022
    Inventors: Hsiao Chyi LIN, Chia Ming TU, Yi Shing LIN, Shao-Yu CHEN
  • Publication number: 20220292039
    Abstract: A connection interface conversion chip, a connection interface conversion device and an operation method are provided. The connection interface conversion chip includes a USB interface circuit, a DP interface circuit, a USB core circuit and a switching circuit. The USB interface circuit is suitable for coupling to a USB connector. The DP interface circuit is coupled to a DP sink device through a DP connector. The USB core circuit is coupled to both the USB interface circuit and the DP interface circuit. The switching circuit is coupled to both the USB interface circuit and the DP interface circuit. The switching circuit supports only one specific conduction mode that only allows transmitting DP signals between the USB interface circuit and the DP interface circuit.
    Type: Application
    Filed: May 30, 2022
    Publication date: September 15, 2022
    Applicant: VIA LABS, INC.
    Inventors: Cheng-Chung Lin, Hsiao-Chyi Lin, Yi-Shing Lin, Chien-Sheng Chen
  • Patent number: 11386030
    Abstract: A connection interface conversion chip, a connection interface conversion device and an operation method are provided. The connection interface conversion chip includes a USB interface circuit, a DP interface circuit, a USB core circuit and a switching circuit. The USB interface circuit is suitable for coupling to a USB connector. The DP interface circuit is suitable for coupling to a DP connector. In a first operation mode, at least one USB signal pair received by the USB connector is transmitted to the USB core circuit through the USB interface circuit. The USB core circuit decodes the USB signal pair and generates DP data. The DP data is transmitted to the DP connector by the DP interface circuit. In a second operation mode, the DP data received by the USB connector is transmitted to the DP connector through the USB interface circuit, the switching circuit and the DP interface circuit.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: July 12, 2022
    Assignee: VIA LABS, INC.
    Inventors: Cheng-Chung Lin, Hsiao-Chyi Lin, Yi-Shing Lin, Chien-Sheng Chen
  • Publication number: 20210271620
    Abstract: A connection interface conversion chip, a connection interface conversion device and an operation method are provided. The connection interface conversion chip includes a USB interface circuit, a DP interface circuit, a USB core circuit and a switching circuit. The USB interface circuit is suitable for coupling to a USB connector. The DP interface circuit is suitable for coupling to a DP connector. In a first operation mode, at least one USB signal pair received by the USB connector is transmitted to the USB core circuit through the USB interface circuit. The USB core circuit decodes the USB signal pair and generates DP data. The DP data is transmitted to the DP connector by the DP interface circuit. In a second operation mode, the DP data received by the USB connector is transmitted to the DP connector through the USB interface circuit, the switching circuit and the DP interface circuit.
    Type: Application
    Filed: December 3, 2020
    Publication date: September 2, 2021
    Applicant: VIA LABS, INC.
    Inventors: Cheng-Chung Lin, Hsiao-Chyi Lin, Yi-Shing Lin, Chien-Sheng Chen
  • Patent number: 10360174
    Abstract: A universal serial bus circuit including a power circuit and a terminating circuit is provided. The power circuit provides a differential signal. The terminating circuit is coupled to the power circuit. The terminating circuit receives the differential signal through the first signal output terminal and the second signal output terminal, and the terminating circuit includes a first load circuit and a second load circuit. When the universal serial bus circuit is operated in a handshake mode, the terminating circuit receives the differential signal through the first load circuit and the second load circuit, and outputs a pulse signal through the first signal output terminal and the second signal output terminal. When the universal serial bus circuit is operated in a normal mode, the terminating circuit receives the differential signal through the first load circuit, and outputs a data signal through the first signal output terminal and the second signal output terminal.
    Type: Grant
    Filed: August 14, 2018
    Date of Patent: July 23, 2019
    Assignee: VIA LABS, INC.
    Inventors: Hsiao-Chyi Lin, Yi-Shing Lin
  • Patent number: 9933493
    Abstract: A battery management system for a battery pack including a plurality of battery cells connected in series is provided. The battery management system includes a first switching unit coupled to an anode of a first battery cell of the battery pack, having a first P-type transistor coupled to the anode of the first battery cell, a first resistor coupled between the anode of the first battery cell and a gate of the first P-type transistor, and a current mirror coupled to the gate of the first P-type transistor and the first resistor, draining a first mirror current from the first resistor in response to a control signal, so as to turn on the first P-type transistor. The system further includes a detection circuit coupled to the first switching unit.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: April 3, 2018
    Assignee: VIA TECHNOLOGIES, INC.
    Inventor: Yi-shing Lin
  • Publication number: 20160313406
    Abstract: A battery management system for a battery pack including a plurality of battery cells connected in series is provided. The battery management system includes a first switching unit coupled to an anode of a first battery cell of the battery pack, having a first P-type transistor coupled to the anode of the first battery cell, a first resistor coupled between the anode of the first battery cell and a gate of the first P-type transistor, and a current mirror coupled to the gate of the first P-type transistor and the first resistor, draining a first mirror current from the first resistor in response to a control signal, so as to turn on the first P-type transistor. The system further includes a detection circuit coupled to the first switching unit.
    Type: Application
    Filed: July 5, 2016
    Publication date: October 27, 2016
    Inventor: Yi-shing LIN
  • Patent number: 9459322
    Abstract: A battery management system for a battery pack including a plurality of battery cells connected in series is provided. The battery management system includes a voltage divider, a plurality of switching units and a detection circuit. Each switching unit is corresponding to one of the battery cell and coupled between an anode of the corresponding battery cell and the voltage divider. When a control signal directs one of the switching units to turn on, the voltage divider divides a voltage difference transmitted from the one of the switching units to obtain a divided voltage signal, and transmits the divided voltage signal to the detection circuit, and the detection circuit detects the voltage difference according to the divided voltage signal, wherein the voltage difference is a voltage difference between an anode of the battery cell corresponding to the one of the switching units and a ground.
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: October 4, 2016
    Assignee: VIA TECHNOLOGIES, INC.
    Inventor: Yi-shing Lin
  • Publication number: 20130342214
    Abstract: A battery management system for a battery pack including a plurality of battery cells connected in series is provided. The battery management system includes a voltage divider, a plurality of switching units and a detection circuit. Each switching unit is corresponding to one of the battery cell and coupled between an anode of the corresponding battery cell and the voltage divider. When a control signal directs one of the switching units to turn on, the voltage divider divides a voltage difference transmitted from the one of the switching units to obtain a divided voltage signal, and transmits the divided voltage signal to the detection circuit, and the detection circuit detects the voltage difference according to the divided voltage signal, wherein the voltage difference is a voltage difference between an anode of the battery cell corresponding to the one of the switching units and a ground.
    Type: Application
    Filed: June 21, 2013
    Publication date: December 26, 2013
    Inventor: Yi-shing LIN