Patents by Inventor Yifan Kong
Yifan Kong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240185393Abstract: The present disclosure relates to systems, methods, and non-transitory computer readable media for accurately, efficiently, and flexibly generating harmonized digital images utilizing a self-supervised image harmonization neural network. In particular, the disclosed systems can implement, and learn parameters for, a self-supervised image harmonization neural network to extract content from one digital image (disentangled from its appearance) and appearance from another from another digital image (disentangled from its content). For example, the disclosed systems can utilize a dual data augmentation method to generate diverse triplets for parameter learning (including input digital images, reference digital images, and pseudo ground truth digital images), via cropping a digital image with perturbations using three-dimensional color lookup tables (“LUTs”).Type: ApplicationFiled: February 13, 2024Publication date: June 6, 2024Inventors: He Zhang, Yifan Jiang, Yilin Wang, Jianming Zhang, Kalyan Sunkavalli, Sarah Kong, Su Chen, Sohrab Amirghodsi, Zhe Lin
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Publication number: 20240138210Abstract: A display substrate, including: a base substrate. The base substrate includes a display region, and the display region is provided with a plurality of sub-pixels and a conductive protective structure. At least one sub-pixel among the plurality of sub-pixels includes: a light-emitting element and a driving circuit that drives the light-emitting element to emit light. The light-emitting elements and the conductive protective structure are located on the side of the driving circuit away from the base substrate. The conductive protective structure includes at least one conductive part, and the at least one conductive part is located at an interval between respective light-emitting parts of light-emitting elements of at least two adjacent sub-pixels. The conductive protective structure is electrically connected to a signal terminal, and is configured to reduce carrier transmission between adjacent sub-pixels.Type: ApplicationFiled: July 4, 2021Publication date: April 25, 2024Inventors: Chao KONG, Yifan YANG, Wei ZHANG
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Patent number: 11935217Abstract: The present disclosure relates to systems, methods, and non-transitory computer readable media for accurately, efficiently, and flexibly generating harmonized digital images utilizing a self-supervised image harmonization neural network. In particular, the disclosed systems can implement, and learn parameters for, a self-supervised image harmonization neural network to extract content from one digital image (disentangled from its appearance) and appearance from another from another digital image (disentangled from its content). For example, the disclosed systems can utilize a dual data augmentation method to generate diverse triplets for parameter learning (including input digital images, reference digital images, and pseudo ground truth digital images), via cropping a digital image with perturbations using three-dimensional color lookup tables (“LUTs”).Type: GrantFiled: March 12, 2021Date of Patent: March 19, 2024Assignee: Adobe Inc.Inventors: He Zhang, Yifan Jiang, Yilin Wang, Jianming Zhang, Kalyan Sunkavalli, Sarah Kong, Su Chen, Sohrab Amirghodsi, Zhe Lin
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Publication number: 20240009481Abstract: In variants, a neural interface system (e.g., retinal implant, neural implant, etc.) can include: a display, a controller, a power source, and/or any other suitable components. The system can be used with an external device including a communication element, a display-brain interface (e.g., cells), and/or any other suitable components.Type: ApplicationFiled: July 7, 2023Publication date: January 11, 2024Inventors: Max Hodak, Alan Mardinly, Yifan Kong
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Patent number: 11401620Abstract: Systems and methods for manufacturing and processing microwires for use as microelectrodes are disclosed. The disclosed techniques provide methods for creating microelectrode bundles with different organizations and patterns. Systems and methods of the present disclosure also provide methods for electrochemically modifying bundles of microelectrode ends.Type: GrantFiled: September 26, 2019Date of Patent: August 2, 2022Assignees: PARADROMICS, INC., THE BOARD OF TRUSTEES OF THE LELAND STANFORD JUNIOR UNIVERSITYInventors: Yifan Kong, Matthew R. Angle, Mina-Elraheb Hanna, Abdulmalik Obaid, Nicholas Melosh
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Publication number: 20220110681Abstract: The present disclosure provides systems, devices, and methods for penetrating a biological membrane. The system may comprise a laser unit configured to generate one or more laser beams. The system may comprise a set of targeting optics configured to direct the one or more laser beams to a target region of the biological membrane. The system may comprise a raster scanner operatively coupled to the laser unit and the set of targeting optics. The system may comprise a non-transitory computer readable storage medium comprising a set of instructions. The set of instructions may be configured to control at least one of the laser unit, the set of targeting optics, or the raster scanner to photodisrupt the target region of the biological membrane to a target depth while minimizing damage to one or more blood vessels in proximity to the target region.Type: ApplicationFiled: August 18, 2021Publication date: April 14, 2022Inventors: Matthew Angle, Mina-Elraheb Saad Hanna, Kevin Boergens, Yifan Kong, Robert Edgington, Kunal Sahasrabuddhe, Devin Fell, Harbaljit Sohal, Matthew Stephen Hopper, Aleksandar Tadic
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Publication number: 20210098341Abstract: An implantable device and methods for forming the same are provided. The device may comprise: (a) a substrate comprising a plurality of feedthroughs, wherein the plurality of feedthroughs comprises a first conductive material; and (b) an array of microwires extending from the substrate. The array of microwires may be connected or bonded to the plurality of feedthroughs using a biocompatible solder or braze material or intermediate filler material. The array of microwires may comprise a second conductive material that is different from the first conductive material.Type: ApplicationFiled: September 24, 2020Publication date: April 1, 2021Inventors: Yifan Kong, Kevin Boergens, Matthew Angle, Aleksandar Tadic
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Patent number: 10581003Abstract: Methods for patterning highly sensitive materials, such as organic materials, organic semiconductors, biomolecular materials, and the like, with photolithographic resolution are disclosed. In some embodiments, a germanium mask (304) is formed on the surface of the sensitive material (302), thereby protecting it from subsequent processes that employ harsh chemicals that would otherwise destroy the sensitive material (302). A microlithography mask (306) is patterned on the germanium mask layer (304), after which the germanium exposed by the microlithography mask (306) is removed by dissolving it in water. After transferring the pattern of the germanium mask (304) into the sensitive material (302), the germanium and microlithography masks (304, 306) are completely removed by immersing the substrate in water, which dissolves the remaining germanium and lifts off the microlithography mask material.Type: GrantFiled: September 1, 2017Date of Patent: March 3, 2020Assignee: The Board of Trustee of the Leland Stanford Junior UniverstiyInventors: Nicholas Alexander Melosh, Matt R. Angle, Mina-elraheb S. Hanna, Yifan Kong
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Publication number: 20200056299Abstract: Systems and methods for manufacturing and processing microwires for use as microelectrodes are disclosed. The disclosed techniques provide methods for creating microelectrode bundles with different organizations and patterns. Systems and methods of the present disclosure also provide methods for electrochemically modifying bundles of microelectrode ends.Type: ApplicationFiled: September 26, 2019Publication date: February 20, 2020Inventors: Yifan Kong, Matthew R. Angle, Mina-Elraheb Hanna, Abdulmalik Obaid, Nicholas Melosh
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Patent number: 10564208Abstract: A system and method for testing the quality of a conductor is disclosed. Specifically, a system of testing a conductor using voltage source generator that is capacitively-coupled through the conductor to voltage detector is disclosed. The voltage source generates a varying voltage signal which induces a voltage signal in the capacitively coupled microwire conductor. The voltage detector that is also capacitively-coupled to the conductor measures the induced voltage. Using the detected voltage signal, the voltage detector determines whether there are any conductive breaks in the conductor.Type: GrantFiled: August 12, 2016Date of Patent: February 18, 2020Assignee: PARADROMICS, INC.Inventors: Matthew Angle, Yifan Kong, Edmund Huber
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Publication number: 20190198785Abstract: Methods for patterning highly sensitive materials, such as organic materials, organic semiconductors, biomolecular materials, and the like, with photolithographic resolution are disclosed. In some embodiments, a germanium mask (304) is formed on the surface of the sensitive material (302), thereby protecting it from subsequent processes that employ harsh chemicals that would otherwise destroy the sensitive material (302). A microlithography mask (306) is patterned on the germanium mask layer (304), after which the germanium exposed by the microlithography mask (306) is removed by dissolving it in water. After transferring the pattern of the germanium mask (304) into the sensitive material (302), the germanium and microlithography masks (304, 306) are completely removed by immersing the substrate in water, which dissolves the remaining germanium and lifts off the microlithography mask material.Type: ApplicationFiled: September 1, 2017Publication date: June 27, 2019Inventors: Nicholas Alexander Melosh, Matt R. Angle, Mina-elraheb S. Hanna, Yifan Kong
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Patent number: 10327655Abstract: A neural-interface probe is provided. The probe may comprise a chip, a wire bundle substrate, and an encapsulant material. The chip may comprise a plurality of bond pads. The wire bundle substrate may comprise a plurality of wires extending through the substrate. The plurality of wires may comprise: (1) a proximal portion connected to the plurality of bond pads to thereby couple the chip to the substrate, and (2) a flexible distal portion configured to interface with neural matter. The encapsulant material may be disposed at least between the chip and the wire bundle substrate.Type: GrantFiled: April 7, 2017Date of Patent: June 25, 2019Assignee: Paradromics, Inc.Inventors: Matthew R. Angle, Yifan Kong
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Publication number: 20180085018Abstract: A system and method for creating desired splay patterned microelectrodes is disclosed. A bundle of microwires is arranged into a desired splay pattern. This may be performed mechanically with a rigid frame, electronically by charging the microwires, or with some other technique. The microwires in the desired splay pattern are then heated to release internal tension. Upon completion of heating, the microwires are then slowly cooled such that the splayed microwires will retain the desired splay pattern. Insulation may then be added to the microwires if the microwires are not already insulated.Type: ApplicationFiled: September 29, 2016Publication date: March 29, 2018Applicant: Paradromics Inc.Inventors: Matthew Angle, Yifan Kong, Edmund Huber
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Publication number: 20170290521Abstract: A neural-interface probe is provided. The probe may comprise a chip, a wire bundle substrate, and an encapsulant material. The chip may comprise a plurality of bond pads. The wire bundle substrate may comprise a plurality of wires extending through the substrate. The plurality of wires may comprise: (1) a proximal portion connected to the plurality of bond pads to thereby couple the chip to the substrate, and (2) a flexible distal portion configured to interface with neural matter. The encapsulant material may be disposed at least between the chip and the wire bundle substrate.Type: ApplicationFiled: April 7, 2017Publication date: October 12, 2017Inventors: Matthew R. Angle, Yifan Kong