Abstract: A fabrication method of a pixel structure and a pixel structure are provided. A first patterned metal layer including scan lines and a gate is formed on a substrate. A first insulation layer, a semiconductor layer, an etching stop pattern and a metal layer are formed sequentially on the first patterned metal layer. The metal layer and the semiconductor layer are patterned to form a second patterned metal layer and a patterned semiconductor layer. The second patterned metal layer includes data lines, a source and a drain. The patterned semiconductor layer includes a first semiconductor pattern completely overlapping the second patterned metal layer and a second semiconductor pattern without overlapping the second patterned metal layer, wherein the second semiconductor pattern includes a channel pattern and a marginal pattern. The channel pattern is between the source and the drain and the marginal pattern surrounds the first semiconductor pattern.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a gate, a channel layer, a gate insulation layer, a source, a drain and a silicon-aluminum-oxide layer. The gate is disposed on a substrate. The channel layer is disposed on the substrate. The channel layer overlaps the gate. The gate insulation layer is disposed between the gate and the channel layer. The source and the drain are disposed on two sides of the channel layer. The silicon-aluminum-oxide layer is disposed on the substrate and covers the source, the drain and the channel layer.

Abstract: A fabrication method of a pixel structure and a pixel structure are provided. A first patterned metal layer including scan lines and a gate is formed on a substrate. A first insulation layer, a semiconductor layer, an etching stop pattern and a metal layer are formed sequentially on the first patterned metal layer. The metal layer and the semiconductor layer are patterned to form a second patterned metal layer and a patterned semiconductor layer. The second patterned metal layer includes data lines, a source and a drain. The patterned semiconductor layer includes a first semiconductor pattern completely overlapping the second patterned metal layer and a second semiconductor pattern without overlapping the second patterned metal layer, wherein the second semiconductor pattern includes a channel pattern and a marginal pattern. The channel pattern is between the source and the drain and the marginal pattern surrounds the first semiconductor pattern.

Abstract: A fabrication method of a pixel structure and a pixel structure are provided. A first patterned metal layer including scan lines and a gate is formed on a substrate. A first insulation layer, a semiconductor layer, an etching stop pattern and a metal layer are formed sequentially on the first patterned metal layer. The metal layer and the semiconductor layer are patterned to form a second patterned metal layer and a patterned semiconductor layer. The second patterned metal layer includes data lines, a source and a drain. The patterned semiconductor layer includes a first semiconductor pattern completely overlapping the second patterned metal layer and a second semiconductor pattern without overlapping the second patterned metal layer, wherein the second semiconductor pattern includes a channel pattern and a marginal pattern. The channel pattern is between the source and the drain and the marginal pattern surrounds the first semiconductor pattern.

Abstract: The present application provides a touch-sensing display panel comprising a display panel and a touch-sensing device disposed above the display panel. The touch-sensing device comprises a plurality of select lines, a plurality of readout lines and a plurality of capacitive touch-sensing units arranged in array. Each of the capacitive touch-sensing units comprises a transistor and a touch-sensing pad, each of the transistors comprises a gate electrode electrically connected to one of the select lines, a source electrode electrically connected to a reference voltage, a drain electrode electrically connected to one of the readout lines, and a channel layer electrically coupled to the touch-sensing pad.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a gate, a channel layer, a gate insulation layer, a source, a drain and a silicon-aluminum-oxide layer. The gate is disposed on a substrate. The channel layer is disposed on the substrate. The channel layer overlaps the gate. The gate insulation layer is disposed between the gate and the channel layer. The source and the drain are disposed on two sides of the channel layer. The silicon-aluminum-oxide layer is disposed on the substrate and covers the source, the drain and the channel layer.

Abstract: A semiconductor device structure on a substrate and a manufacture method thereof is provided. The semiconductor device structure includes an oxide semiconductor transistor and a passivation layer containing free hydrogen. The semiconductor device structure is formed by following steps. A gate electrode is formed on the substrate. A gate dielectric layer covers the gate electrode. A source electrode is formed on the gate dielectric layer. A drain electrode is formed on the gate dielectric layer and separated from the source electrode and thereby forming a channel distance. An oxide semiconductor layer is formed on the gate dielectric layer, the source electrode and the drain electrode and between the source electrode and the drain electrode. The oxide semiconductor layer is further electrically connected with the source electrode and the drain electrode. A passivation layer covers the oxide semiconductor layer, the source electrode and the drain electrode.

Abstract: A thin film transistor (TFT) and a pixel structure having the TFT are provided. The TFT is configured on a substrate. Besides, the TFT includes a gate, a gate insulation layer, a source, a channel layer, and a drain. The gate insulation layer covers the gate and the substrate. The source is configured on a portion of the gate insulation layer. The channel layer is configured on the gate insulation layer and covers a portion of the source located above the gate. The drain is configured on and electrically connected to the channel layer.

Abstract: The present application provides a touch-sensing display panel comprising a display panel and a touch-sensing device disposed above the display panel. The touch-sensing device comprises a plurality of select lines, a plurality of readout lines and a plurality of capacitive touch-sensing units arranged in array. Each of the capacitive touch-sensing units comprises a transistor and a touch-sensing pad, each of the transistors comprises a gate electrode electrically connected to one of the select lines, a source electrode electrically connected to a reference voltage, a drain electrode electrically connected to one of the readout lines, and a channel layer electrically coupled to the touch-sensing pad.

Abstract: A thin film transistor (TFT) and a pixel structure having the TFT are provided. The TFT is configured on a substrate. Besides, the TFT includes a gate, a gate insulation layer, a source, a channel layer, and a drain. The gate insulation layer covers the gate and the substrate. The source is configured on a portion of the gate insulation layer. The channel layer is configured on the gate insulation layer and covers a portion of the source located above the gate. The drain is configured on and electrically connected to the channel layer.

Abstract: A display panel, a repair method, and an active device array substrate including a substrate, first and second signal lines, active devices, pixel electrodes, a bus line, and a switch device are provided. The bus line and the switch device are disposed outside a display region of the active device array substrate. The switch device has a gate coupled to the bus line, a first electrode coupled to a signal source, and a second electrode coupled to one of the first signal lines. The first and second electrodes are comb-shaped. The first electrode includes first fingers parallel to one another and a first connection portion connected to the first fingers. The second electrode includes second fingers parallel to one another and a second connection portion connected to the second fingers. The first and second fingers are arranged alternately. A portion of the first electrode is located outside the gate.

Abstract: A semiconductor device structure on a substrate and a manufacture method thereof is provided. The semiconductor device structure includes an oxide semiconductor transistor and a passivation layer containing free hydrogen. The semiconductor device structure is formed by following steps. A gate electrode is formed on the substrate. A gate dielectric layer covers the gate electrode. A source electrode is formed on the gate dielectric layer. A drain electrode is formed on the gate dielectric layer and separated from the source electrode and thereby forming a channel distance. An oxide semiconductor layer is formed on the gate dielectric layer, the source electrode and the drain electrode and between the source electrode and the drain electrode. The oxide semiconductor layer is further electrically connected with the source electrode and the drain electrode. A passivation layer covers the oxide semiconductor layer, the source electrode and the drain electrode.