Abstract: A switch mode power supply system has a constant on-time signal generator, a logic circuit, a feedback circuit, a first ramp signal generator, a second ramp signal generator, a switch circuit having a power switch, and a comparator. A feedback signal from the feedback circuit is compensated by the first ramp signal generator, and a reference signal is compensated by the second ramp signal generator. The comparator compares the compensated feedback signal with the compensated reference signal to indicate an off time of the power switch while the constant on-time signal generator decides the on-time of the power switch.

Abstract: A switching regulator including: a power stage having a first power switch and a second power switch coupled in series; a filter circuit having an inductor and an output capacitor; a feedback circuit configured to provide a feedback signal indicating an output voltage of the regulator; and a control circuit configured to provide a switching signal to control the ON and OFF of the first power switch so as to regulate the energy supplied to a load; wherein the control circuit has a peak current generator configured to generate a peak current signal, wherein the gain of a variation of the peak current signal between the contiguous switching cycles is less than one.

Abstract: A peak sample circuit for AC voltage, including: a rectifier coupled to receive an AC voltage and to rectify the AC voltage to generate a rectified signal; a delay circuit coupled to receive the rectified signal and to delay the rectified signal to generate a delayed rectified signal; a comparison circuit coupled to receive the delayed rectified signal and to generate a square signal based on the comparison of the rectified signal and the delayed rectified signal; and a sample output circuit coupled to receive the rectified signal, wherein the sample output circuit samples the rectified signal under the control of the square signal and provides a peak sample signal representative of the peak value of the AC voltage.

Abstract: A power converter having a current limit module and a method for controlling the power converter. The power converter converts an input voltage to an output voltage based at least on driving a main switch to switch on and off and regulates the output voltage through regulating a duty cycle of the main switch. The current limit module is configured to compensate a first current limit threshold indicative of a maximum allowable value of a peak value of a switching current of the main switch with a threshold compensation signal indicative of the duty cycle to provide a second current limit threshold. The second current limit threshold is used to limit the maximum value of the peak value, so that a maximum allowable output power of the power converter is substantially uninfluenced by the variation in the duty cycle.

Abstract: A switching converter and a load regulation compensation module for improving load regulation accuracy of the switching converter. The switching converter regulates its output voltage through controlling a switch module to switch on and off based on a first reference signal and a feedback signal indicative of the output voltage. The on and off switching of the switch module generates a switching current, resulting in an average offset voltage between an internal reference ground and a package ground pin of the switching converter. The load regulation compensation module is configured to monitor the switching current, and to compensate a second reference signal having a bandgap reference voltage referenced to the internal reference ground based on the monitored switching current to generate the first reference signal, so that the average offset voltage is substantially cancelled out from the first reference signal with respect to the package ground pin.

Abstract: A controller having an on-time controller, an off-time controller, a switch control signal generator, and a jittering signal generator, wherein the jittering signal generator couples jitter into the on-time or the off-time of a primary switch of the power supply. Therefore the EMI performance may be improved.

Abstract: A sample and hold circuit and the method thereof are disclosed. The sample and hold circuit may be applied in voltage regulators or other circuits. The sample and hold circuit comprises: an input terminal configured to receive an input signal; an output terminal configured to provide an output signal; a control circuit configured to receive the input signal and the output signal, and wherein based on the input signal and the output signal, the control circuit generates a digital signal, and wherein the digital signal increases when the output signal is lower than the input signal, and maintains when the output signal is larger than or equal to the input signal; a digital-to-analog converter (DAC) configured to convert the digital signal to the output signal.

Abstract: The embodiments of the present circuit and method disclose a bridge rectifier and a driving circuit. The bridge rectifier having a first input, a second input, a first output, and a second output may comprise two high side diodes and two low side switches. The driving circuit may be coupled to the first input of the bridge rectifier and the second input of the bridge rectifier, and the driving circuit may be configured to provide a first driving signal and a second driving signal. The first driving signal may be coupled to a first low side switch and the second driving signal may be coupled to a second low side switch. The first driving signal may be limited to less than a first predetermined driving voltage and the second driving signal may be limited to less than a second predetermined driving voltage.

Abstract: An AC signal detector having: a rectify circuit having a first input terminal and a second input terminal configured to receive an AC signal, and an output terminal configured to provide a rectified signal based on the AC signal; a detecting circuit having an input terminal coupled to the output terminal of the rectify circuit to receive the rectified signal, and an output terminal configured to provide a square signal based on the rectified signal; and an unplug indicate circuit having an input terminal coupled to the detecting circuit to receive the square signal, and an output terminal configured to provide an unplug indicate signal based on the square signal.

Abstract: A drive and control circuit for motor system and the method thereof are disclosed. The motor system could be applied in a cooling device, wherein the motor system comprises a rotor, a coil and a bridge circuit. The drive and control circuit comprises a control unit, a state detecting circuit, a load determining circuit, and a startup setting circuit. The startup setting circuit makes the motor run with the maximum torque, thus to make the motor system start up easily and quickly. The load determining circuit detects the load of the motor system, thus to generate a load determining signal to determine the speed of the motor system. The control unit could be realized with few components so as to save the costs.

Abstract: A frequency limitation method used in a quasi-resonant controlled switching regulator is disclosed. The switching frequency is limited by setting a minimum time period, such as a minimum switching period or a minimum OFF time period. The minimum time period is varying according to the difference between the minimum time period of the previous cycle and an offset value, so as to eliminate the audible noise caused by the frequency hopping when the minimum OFF time period is close to the valley of a quasi-resonant signal.

Abstract: A switching regulator including: a power stage having a first power switch and a second power switch coupled in series; a filter circuit having an inductor and an output capacitor; a feedback circuit configured to provide a feedback signal indicating an output voltage of the regulator; and a control circuit configured to provide a switching signal to control the ON and OFF of the first power switch so as to regulate the energy supplied to a load; wherein the control circuit has a peak current generator configured to generate a peak current signal, wherein the gain of a variation of the peak current signal between the contiguous switching cycles is less than one.

Abstract: A high side buck converter includes a high side transistor, a low side transistor, a sensor, a sensing window generator, an error amplifier, a first comparator and an on-time signal generator. The high side and low side transistors are coupled together to form a switch node which is used as the reference ground of the controller. The sensor senses the output voltage and generates a sensing signal. The sensing window generator generates a sensing window signal. The error amplifier amplifies the error between a feedback signal of the sensing signal and a reference signal during the sensing window, and generates an error signal. The first comparator compares the feedback signal with the error signal and generates a first comparison signal. The on-time signal generator generates an on-time signal based on the first comparison signal, so as to control the high side and low side transistors.

Abstract: The present disclosure discloses a voltage regulator including a trimming circuit. The present disclosure also discloses a method for trimming an output voltage of a voltage regulator. In one embodiment the voltage regulator may include a power conversion module, a feedback and trimming module and a control module. The voltage regulator may be able to provide an output voltage that could be regulated to a plurality of output values, the feedback and trimming module may be able to trim the plurality of output values to their desired values successively and independently.

Abstract: The embodiments of the present invention disclose a charge-pump voltage divider and associated start-up method. The charge-pump voltage divider comprises a start-up circuit that can regulate an inrush current during start up. The start-up circuit comprises a switch, which operates in linear region state during start-up, and operates in switching state after the start-up completes. The charge-pump voltage divider may further comprise a load control switch configured to ensure the start-up is independent of a load current.

Abstract: A DC brushless motor system is disclosed. When a rotor of the DC brushless motor is close to an aligned position, there will be current spike in the coil and voltage spike in an input capacitor. By decreasing the peak current limit of the current in the coil when the rotor is close to the aligned position, the current spike and the voltage spike are reduced.

Abstract: A no-load detecting circuit and the method thereof are disclosed. The no-load detecting circuit may be applied in switching mode power supplies or other circuits. The no-load detecting circuit comprises: a variable resistance circuit coupled in series to a load of the switching mode power supply; and a first comparison circuit coupled to the variable resistance circuit to receive the voltage across the variable resistance circuit, wherein based on the comparison of the voltage across the variable resistance circuit and a first threshold, the first comparison circuit generates a no-load detecting signal indicative of the load status; wherein the equivalent resistance of the variable resistance circuit varies based on the varying of the load of the switching mode power supply.

Abstract: A switching power converter with an input terminal configured to receive a first input voltage; an output terminal configured to provide an output current to a load, wherein the output current has a peak value and an average value; a power switch; a first loop coupled to the input terminal, wherein the first loop configured to generate a first output signal based on the first input voltage; a second loop configured to generate a second output signal based on the output current; a multiplier configured to generate a multiplying signal based on multiplying the first output signal with the second output signal; and a driving circuit configured to generate a driving signal based on the multiplying signal to control the power switch, so as to reduce the ratio between the peak value and the average value of the output current.

Abstract: A sample and hold circuit and the method thereof are disclosed. The sample and hold circuit may be applied in voltage regulators or other circuits. The sample and hold circuit comprises: an input terminal configured to receive an input signal; an output terminal configured to provide an output signal; a control circuit configured to receive the input signal and the output signal, and wherein based on the input signal and the output signal, the control circuit generates a digital signal, and wherein the digital signal increases when the output signal is lower than the input signal, and maintains when the output signal is larger than or equal to the input signal; a digital-to-analog converter (DAC) configured to convert the digital signal to the output signal.

Abstract: One embodiment of the present invention discloses a switch-mode power supply controller and associated method. In an embodiment, the controller comprises an on-time controller, an off-time controller, a switch control signal generator, and a jittering signal generator, wherein the jittering signal generator couples jitter into the on-time or the off-time of a primary switch of the power supply. Therefore the EMI performance may be improved.