Abstract: In a method for obtaining the equivalent oxide thickness of a dielectric layer, a first semiconductor capacitor including a first silicon dioxide layer and a second semiconductor capacitor including a second silicon dioxide layer are provided and a modulation voltage is applied to the semiconductor capacitors to measure a first scanning capacitance microscopic signal and a second scanning capacitance microscopic signal. According to the equivalent oxide thicknesses of the silicon dioxide layers and the scanning capacitance microscopic signals, an impedance ratio is calculated. The modulation voltage is applied to a third semiconductor capacitor including a dielectric layer to measure a third scanning capacitance microscopic signal. Finally, the equivalent oxide thickness of the dielectric layer is obtained according to the equivalent oxide thickness of the first silicon dioxide layer, the first scanning capacitance microscopic signal, third scanning capacitance microscopic signal, and the impedance ratio.

Abstract: A memory test circuit is provided. The memory test circuit is disposed in a memory array and including: a test array, including test cells out of memory cells of the memory array; a write multiplexer, configured to selectively output one of a test signal and a reference voltage based on a write measurement signal, wherein the test signal is output to write into at least one test cell and the reference voltage is output to a sense amplifier; and a read multiplexer, configured to selectively receive and output one of a readout signal corresponding to the test signal and an amplified signal based on a read measurement signal, wherein the readout signal is read from the at least one test cell and the amplified signal is obtained for a read margin evaluation from the sense amplifier by amplifying a voltage difference between the readout signal and the reference voltage.

Abstract: A memory test circuit is provided. The memory test circuit is disposed in a memory chip and electrically coupled to a memory macro of the memory chip. A high speed clock receives an input signal and an external clock signal. The input signal includes a plurality of test bits. A finite state machine controller provides a pattern type. A pattern generator generates and provides a test signal to at least one memory cell of the memory chip to write the test signal to the at least one memory cell based on the pattern type and the external clock signal. A test frequency of the test signal is determined based on the high speed clock. An output comparator outputs a comparison signal based on a difference between the test signal and a readout signal corresponding to the test signal read from the at least one memory cell.

Abstract: A method of evaluating a focus control of an extreme ultraviolet (EUV) lithography apparatus includes preparing a wafer exposed by using the EUV lithography apparatus. The wafer includes test patterns formed of a photoresist and having circular islands or holes prepared by multiple exposures of EUV at different foci of exposure. The method further includes measuring a roughness parameter of the test patterns and estimating a function representing a dependence of the roughness parameter on the focus. A best focus is estimated based on an extremum of the function. Exposure wafers are then exposed to EUV with the best focus. The exposure wafers include the test patterns. The roughness parameter for the test patterns on the exposure wafers obtained by exposing the exposure wafers at the best focus is periodically measured. An abnormality in focus is then determined based on the measured roughness parameter and the function.

Abstract: A method of evaluating a focus control of an extreme ultraviolet (EUV) lithography apparatus includes preparing a wafer exposed by using the EUV lithography apparatus. The wafer includes test patterns formed of a photoresist and having circular islands or holes prepared by multiple exposures of EUV at different foci of exposure. The method further includes measuring a roughness parameter of the test patterns and estimating a function representing a dependence of the roughness parameter on the focus. A best focus is estimated based on an extremum of the function. Exposure wafers are then exposed to EUV with the best focus. The exposure wafers include the test patterns. The roughness parameter for the test patterns on the exposure wafers obtained by exposing the exposure wafers at the best focus is periodically measured. An abnormality in focus is then determined based on the measured roughness parameter and the function.

Abstract: A method of evaluating a focus control of an extreme ultraviolet (EUV) lithography apparatus includes preparing a wafer exposed by using the EUV lithography apparatus. The wafer includes test patterns formed of a photoresist and having circular islands or holes prepared by multiple exposures of EUV at different foci of exposure. The method further includes measuring a roughness parameter of the test patterns and estimating a function representing a dependence of the roughness parameter on the focus. A best focus is estimated based on an extremum of the function. Exposure wafers are then exposed to EUV with the best focus. The exposure wafers include the test patterns. The roughness parameter for the test patterns on the exposure wafers obtained by exposing the exposure wafers at the best focus is periodically measured. An abnormality in focus is then determined based on the measured roughness parameter and the function.

Abstract: A method of evaluating a focus control of an extreme ultraviolet (EUV) lithography apparatus includes preparing a wafer exposed by using the EUV lithography apparatus. The wafer includes test patterns formed of a photoresist and having circular islands or holes prepared by multiple exposures of EUV at different foci of exposure. The method further includes measuring a roughness parameter of the test patterns and estimating a function representing a dependence of the roughness parameter on the focus. A best focus is estimated based on an extremum of the function. Exposure wafers are then exposed to EUV with the best focus. The exposure wafers include the test patterns. The roughness parameter for the test patterns on the exposure wafers obtained by exposing the exposure wafers at the best focus is periodically measured. An abnormality in focus is then determined based on the measured roughness parameter and the function.