Patents by Inventor Yin Tat Ma

Yin Tat Ma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7893791
    Abstract: Devices and systems for using a Gallium Nitride-based (GaN-based) transistor for selectively switching signals are provided. A first transmission line is configured to connect a common connection and a first connection. A first Gallium-Nitride-based (GaN-based) transistor has a first terminal coupled to the first transmission line at a first point, a second terminal coupled to a relative ground, and a third terminal configured to be coupled to a first control connection. A second GaN-based transistor has a first terminal coupled to the first transmission line at a second point, a second terminal configured to be coupled to the relative ground, and a third terminal configured to be coupled to the first control connection.
    Type: Grant
    Filed: October 22, 2008
    Date of Patent: February 22, 2011
    Assignee: The Boeing Company
    Inventors: Yin Tat Ma, Jonathan Hacker, Karim S. Boutros
  • Publication number: 20100097119
    Abstract: Devices and systems for using a Gallium Nitride-based (GaN-based) transistor for selectively switching signals are provided. A first transmission line is configured to connect a common connection and a first connection. A first Gallium-Nitride-based (GaN-based) transistor has a first terminal coupled to the first transmission line at a first point, a second terminal coupled to a relative ground, and a third terminal configured to be coupled to a first control connection. A second GaN-based transistor has a first terminal coupled to the first transmission line at a second point, a second terminal configured to be coupled to the relative ground, and a third terminal configured to be coupled to the first control connection.
    Type: Application
    Filed: October 22, 2008
    Publication date: April 22, 2010
    Applicant: The Boeing Company
    Inventors: Yin Tat Ma, Jonathan Hacker, Karim S. Boutros
  • Patent number: 7423490
    Abstract: An n-stage RF choke comprises a series connection of two or more inductors connected in series between a source and a load. The inductor closest to the source has the largest inductance and the inductance closest to the load has the smallest inductance. The inductances of any inductors between the inductor closest to the supply and the inductor closest to the load decrease as a function of distance from the supply. The junctions between the inductors in the series connection are shunted to ground by capacitors connected in series with resistors that provide a matched termination for increasing bandwidth by lowering circuit Q factors and eliminating resonant frequencies. The capacitor closest to the supply has the largest capacitance and the capacitor closest to the load has the smallest capacitance. Any intermediate capacitors decrease in capacitance as a function of distance from the supply. Such an arrangement provides a high impedance that isolates the load from the supply at a wide range of frequencies.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: September 9, 2008
    Assignee: Rockwell Scientific Licensing, LLC
    Inventors: Yin Tat Ma, Jonathan Bruce Hacker
  • Patent number: 7408752
    Abstract: A low loading capacitance on-chip electrostatic discharge (ESD) protection circuit for compound semiconductor power amplifiers is disclosed, which does not degrade the circuit RF performance. Its principle of operation and simulation results regarding capacitance loading, leakage current, degradation to RF performance are disclosed. The design, loading effect over frequency, robustness over process and temperature variation and application to an RF power amplifier is presented in detail. The ESD circuit couples an input to ground during ESD surges through a diode string coupled to the input, and a transistor switch or Darlington pair having its gate coupled to and triggered by the diode string. The Darlington pair couples the input to ground when triggered through a low impedance path in parallel to the diode string. A reverse diode also couples ground to the input on reverse surges.
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: August 5, 2008
    Assignee: The Regents of the University of California
    Inventors: Yin Tat Ma, Guann Pyng Li
  • Patent number: 7280332
    Abstract: A low loading capacitance on-chip electrostatic discharge (ESD) protection circuit for compound semiconductor power amplifiers is disclosed, which does not degrade the circuit RF performance. Its principle of operation and simulation results regarding capacitance loading, leakage current, degradation to RF performance are disclosed. The design, loading effect over frequency, robustness over process and temperature variation and application to an RF Power amplifier is presented in detail. The ESD circuit couples an input to ground during ESD surges through a diode string coupled to the input, and a transistor switch or Darlington pair having its gate coupled to and triggered by the diode string. The Darlington pair couples the input to ground when triggered through a low impedance path in parallel to the diode string. A reverse diode also couples ground to the input on reverse surges.
    Type: Grant
    Filed: January 16, 2003
    Date of Patent: October 9, 2007
    Assignee: The Regents of The University of California
    Inventors: Yin Tat Ma, Guann-Pyng Li