Abstract: A method includes forming a gate stack on a first portion of a semiconductor substrate, removing a second portion of the semiconductor substrate on a side of the gate stack to form a recess, growing a semiconductor region starting from the recess, implanting the semiconductor region with an impurity, and performing a melt anneal on the semiconductor region. At least a portion of the semiconductor region is molten during the melt anneal.

Abstract: A low voltage inverter-based amplifier includes a first inverter-based amplification module, a second inverter-based amplification module, an inverter-based feedforward module, and an inverter-based common mode detector. The first inverter-based amplification module receives an input signal. The second inverter-based amplification module receives the input signal through the inverter-based feedforward module, and receives a first output signal from the first inverter-based amplification module. The inverter-based common mode detector receives an amplified signal from the second inverter-based amplification module, and outputs a feedback signal to the second inverter-based amplification module. Since the first and the second inverter-based amplification modules are both inverter-based, the supply voltage of the low voltage inverter-based amplifier is provided to supply one PMOS and one NMOS for normal operation.

Abstract: A frequency-modulated continuous-wave radar system includes a waveform generator, a delta-sigma modulation circuit, a voltage controlled oscillator, a frequency divider circuit, a control circuit, an injection locked oscillator, a power amplifier circuit, a first power detection circuit, a second power detection circuit, a third power detection circuit, and a calibration engine circuit. The waveform generator, the delta-sigma modulation circuit, the voltage controlled oscillator, the frequency divider circuit, and the control circuit form a phase locked loop.

Abstract: An oscillating circuit has an injection-locked oscillator (ILO) and a calibration circuit. The ILO has a Gm cell and an LC tank. A first node of the Gm cell receives a first injection signal, and a second node of the Gm cell receives a second injection signal. The first injection signal and the second injection signal are differential signals. The Gm cell provides a negative resistance between a first output end and a second output end of the Gm cell. When the calibration circuit tunes a resonant frequency of the LC tank of the ILO, the magnitude of the negative resistance is reduced to control the ILO to stop self-oscillating. After finishing tuning the resonant frequency of the LC tank, the calibration circuit controls the ILO to start self-oscillating by increasing the magnitude of the negative resistance.

Abstract: A method for enhancing linearity of the receiver front-end system includes receiving a radio frequency signal by an antenna, converting the radio frequency signal to first differential signals by a transformer module, adjusting frequencies of the first differential signals to generate second differential signals by a mixer module, detecting a common signal in order to reduce a common error of the second differential signals, and generating third differential signals according to a reference signal after the common error is reduced from the second differential signals. The first differential signals, the second differential signals, and the third differential signals are unbalanced.

Abstract: An oscillating circuit has an injection-locked oscillator (ILO) and a calibration circuit. The ILO has a Gm cell and an LC tank. A first node of the Gm cell receives a first injection signal, and a second node of the Gm cell receives a second injection signal. The first injection signal and the second injection signal are differential signals. The Gm cell provides a negative resistance between a first output end and a second output end of the Gm cell. When the calibration circuit tunes a resonant frequency of the LC tank of the ILO, the magnitude of the negative resistance is reduced to control the ILO to stop self-oscillating. After finishing tuning the resonant frequency of the LC tank, the calibration circuit controls the ILO to start self-oscillating by increasing the magnitude of the negative resistance.

Abstract: A low voltage inverter-based amplifier includes a first inverter-based amplification module, a second inverter-based amplification module, an inverter-based feedforward module, and an inverter-based common mode detector. The first inverter-based amplification module receives an input signal. The second inverter-based amplification module receives the input signal through the inverter-based feedforward module, and receives a first output signal from the first inverter-based amplification module. The inverter-based common mode detector receives an amplified signal from the second inverter-based amplification module, and outputs a feedback signal to the second inverter-based amplification module. Since the first and the second inverter-based amplification modules are both inverter-based, the supply voltage of the low voltage inverter-based amplifier is provided to supply one PMOS and one NMOS for normal operation.

Abstract: A divider-less phase locked loop (PLL) includes a phase frequency detector (PFD), a charge pump (CP), a voltage controlled oscillator (VCO), a delay unit, and a clock gating unit. The PFD is electrically connected to the VCO through the CP, and the CP outputs a voltage control signal to the VCO. The VCO generates an output signal. The delay unit receives and delays a reference signal to generate a delay signal. The clock gating unit samples the output signal according to the delay signal. Since the clock gating unit samples the output signal according to the delay signal, the divider-less PLL does not need to include a divider to divide a frequency of the output signal. Therefore, power consumption of the divider-less PLL can be reduced.

Abstract: A frequency-modulated continuous-wave radar system includes a waveform generator, a delta-sigma modulation circuit, a voltage controlled oscillator, a frequency divider circuit, a control circuit, an injection locked oscillator, a power amplifier circuit, a first power detection circuit, a second power detection circuit, a third power detection circuit, and a calibration engine circuit. The waveform generator, the delta-sigma modulation circuit, the voltage controlled oscillator, the frequency divider circuit, and the control circuit form a phase locked loop.

Abstract: A method for enhancing linearity of the receiver front-end system includes receiving a radio frequency signal by an antenna, converting the radio frequency signal to first differential signals by a transformer module, adjusting frequencies of the first differential signals to generate second differential signals by a mixer module, detecting a common signal in order to reduce a common error of the second differential signals, and generating third differential signals according to a reference signal after the common error is reduced from the second differential signals. The first differential signals, the second differential signals, and the third differential signals are unbalanced.

Abstract: A divider-less phase locked loop (PLL) includes a phase frequency detector (PFD), a charge pump (CP), a voltage controlled oscillator (VCO), a delay unit, and a clock gating unit. The PFD is electrically connected to the VCO through the CP, and the CP outputs a voltage control signal to the VCO. The VCO generates an output signal. The delay unit receives and delays a reference signal to generate a delay signal. The clock gating unit samples the output signal according to the delay signal. Since the clock gating unit samples the output signal according to the delay signal, the divider-less PLL does not need to include a divider to divide a frequency of the output signal. Therefore, power consumption of the divider-less PLL can be reduced.

Abstract: Disclosed is an edge-lit backlight module having a rectangular back panel with a reflective microstructure, and a first light portion with an inclined plane or a camber is provided for reflecting lights emitted from a plurality of LEDs and with a relatively smaller normal included angle, and a second light portion is provided for reflecting a light with a slightly greater included angle, and a third light portion is provided for reflecting the light with the greatest included angle to guide lights of different intensities to different paths and project the lights to every position of a front panel, so as to achieve a light extraction efficiency with a uniform distribution of luminous intensity of an LED light source.

Abstract: An LED package comprises a substrate, a constant current die, an LED die and an encapsulation body. The substrate has a plurality of internal conductive contacts and a plurality of external conductive contacts. The constant current die is electrically connected to the internal conductive contact, and comprises a constant current circuit and a protection circuit in parallel, wherein the constant current circuit allows a first current to flow through and the protection circuit allows a second current, in an opposite direction to the first current, to flow through. The LED die is electrically connected to the internal conductive contact. The encapsulation body encapsulates the constant current die, the LED die and the internal conductive contacts of the substrate. Having a small volume, the LED package can be applied to a compact lamp and prevents the LED from being damaged. An LED lamp comprising the LED package is also disclosed.

Abstract: An LED lamp driven by alternating current includes at least a first constant-current supplying device, at least a second constant-current supplying device and at least an LED load. A terminal of the first constant-current supplying device is connected to the first connecting terminal of the AC power source. A terminal of the second constant-current supplying device is connected to the second connecting terminal of the AC power source. The LED load is connected between the first constant-current supplying device and the second constant-current supplying device in series. Through the current limiting function of the first constant-current supplying device and the second constant-current supplying device, the LED lamp may be protected.

Abstract: An LED package comprises a substrate, a constant current die, an LED die and an encapsulation body. The substrate has a plurality of internal conductive contacts and a plurality of external conductive contacts. The constant current die is electrically connected to the internal conductive contact, and comprises a constant current circuit and a protection circuit in parallel, wherein the constant current circuit allows a first current to flow through and the protection circuit allows a second current, in an opposite direction to the first current, to flow through. The LED die is electrically connected to the internal conductive contact. The encapsulation body encapsulates the constant current die, the LED die and the internal conductive contacts of the substrate. Having a small volume, the LED package can be applied to a compact lamp and prevents the LED from being damaged. An LED lamp comprising the LED package is also disclosed.

Abstract: An LED lamp driven by alternating current includes at least a first constant-current supplying device, at least a second constant-current supplying device and at least an LED load. A terminal of the first constant-current supplying device is connected to the first connecting terminal of the AC power source. A terminal of the second constant-current supplying device is connected to the second connecting terminal of the AC power source. The LED load is connected between the first constant-current supplying device and the second constant-current supplying device in series. Through the current limiting function of the first constant-current supplying device and the second constant-current supplying device, the LED lamp may be protected.

Abstract: A method for forming a thin film transistor (TFT) is disclosed. The invention uses metal electroless plating or chemical displacement processes to form metal clusters adjacent the sidewall of amorphous silicon active region pattern so as to crystallize the amorphous silicon amid the subsequently performed metal induced lateral crystallization (MILC) process. The amorphous silicon is crystallized to form polysilicon having parallel grains. Since the amorphous silicon will crystallize with a specific angle which is measured between the grain orientation and the side wall of the amorphous silicon, a tilt channel connecting the source and drain region of the TFT is utilized to upgrade the electron mobility across the tilt channel, wherein the grain orientation of polysilicon in the tilt channel perpendicular to a gate electrode which is subsequently formed above the tilt channel.