Patents by Inventor Ying-Chieh Shyu

Ying-Chieh Shyu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8008992
    Abstract: A transformer is provided with four capacitors and four inductors. The first capacitor is electrically connected between a first port and ground in series. The first inductor is electrically connected to the first port in series. The second capacitor is electrically connected between the first inductor and ground in series. The second inductor is electrically connected between the first inductor and the second capacitor in series. The third capacitor is electrically connected between a second port and ground in series. The third inductor is electrically connected to the second port in series. The fourth capacitor is electrically connected between a third port and ground in series. The fourth inductor is electrically connected between the third inductor and the third port in series.
    Type: Grant
    Filed: February 6, 2009
    Date of Patent: August 30, 2011
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi-Han Chen, Pao-Nan Lee, Ying-Chieh Shyu
  • Patent number: 7994873
    Abstract: A balun device including a first to a third inductance elements and a first to a third capacitance elements is provided. The first inductance element has a first end for receiving an input signal and a second end. The second inductance element has a third end and a fourth end, wherein the third and the forth ends are for outputting a first and a second output signals corresponding to the input signal, respectively. The first output signal and the second output signal substantially have the same amplitude and opposite phases. The first and the second inductance elements generate mutual inductance. The first capacitance element is coupled to the first end. The second capacitance element is coupled to the third end. The third capacitance element is coupled to the fourth end. The third inductance element is seriesly connected to one of the first to the third capacitance elements.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: August 9, 2011
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Ying-Chieh Shyu
  • Patent number: 7808357
    Abstract: A dual inductance structure including a substrate, a first inductance element, a second inductance element and a grounding element is provided. The substrate has a layout layer and a grounding layer. The first inductance element has a first and a second conductor. The second inductance element has a third and a fourth conductor. The grounding element has a first and a second grounding portion. The first grounding portion is on the grounding layer and located at an area between the first conductor and the third conductor. At least a part of the second grounding portion is on the grounding layer and located at an area between the first conductor and the second conductor. At least another part of the second grounding portion is on the grounding layer and located at an area between the third conductor and the fourth conductor.
    Type: Grant
    Filed: April 22, 2009
    Date of Patent: October 5, 2010
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Ying-Chieh Shyu, Pao-Nan Lee, Chi-Han Chen
  • Publication number: 20100060376
    Abstract: A balun device including a first to a third inductance elements and a first to a third capacitance elements is provided. The first inductance element has a first end for receiving an input signal and a second end. The second inductance element has a third end and a fourth end, wherein the third and the forth ends are for outputting a first and a second output signals corresponding to the input signal, respectively. The first output signal and the second output signal substantially have the same amplitude and opposite phases. The first and the second inductance elements generate mutual inductance. The first capacitance element is coupled to the first end. The second capacitance element is coupled to the third end. The third capacitance element is coupled to the fourth end. The third inductance element is seriesly connected to one of the first to the third capacitance elements.
    Type: Application
    Filed: April 21, 2009
    Publication date: March 11, 2010
    Inventor: Ying-Chieh SHYU
  • Publication number: 20100060403
    Abstract: A dual inductance structure including a substrate, a first inductance element, a second inductance element and a grounding element is provided. The substrate has a layout layer and a grounding layer. The first inductance element has a first and a second conductor. The second inductance element has a third and a fourth conductor. The grounding element has a first and a second grounding portion. The first grounding portion is on the grounding layer and located at an area between the first conductor and the third conductor. At least a part of the second grounding portion is on the grounding layer and located at an area between the first conductor and the second conductor. At least another part of the second grounding portion is on the grounding layer and located at an area between the third conductor and the fourth conductor.
    Type: Application
    Filed: April 22, 2009
    Publication date: March 11, 2010
    Inventors: Ying-Chieh Shyu, Pao-Nan Lee, Chi-Han Chen
  • Publication number: 20100007439
    Abstract: A transformer is provided with four capacitors and four inductors. The first capacitor is electrically connected between a first port and ground in series. The first inductor is electrically connected to the first port in series. The second capacitor is electrically connected between the first inductor and ground in series. The second inductor is electrically connected between the first inductor and the second capacitor in series. The third capacitor is electrically connected between a second port and ground in series. The third inductor is electrically connected to the second port in series. The fourth capacitor is electrically connected between a third port and ground in series. The fourth inductor is electrically connected between the third inductor and the third port in series.
    Type: Application
    Filed: February 6, 2009
    Publication date: January 14, 2010
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chi-Han Chen, Pao-Nan Lee, Ying-Chieh Shyu