Patents by Inventor Ying Liew

Ying Liew has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240163223
    Abstract: The present invention relates to a method (100) for network-on-chip arbitration. The method (100) comprises the steps of receiving input from a user via user interface and selecting a plurality of flits from a plurality of ingress into a plurality of virtual channels followed by selecting the flits from the virtual channels into a plurality of egress based on the input from the user. The selection of the flits into the virtual channels and the egress characterized by the steps of computing default and elevated bandwidths of the virtual channels, computing default and elevated weights of the virtual channels based on the default and elevated bandwidths and generating a weightage lookup table using the default and elevated weights to perform arbitration weightage lookup for the flits with default and elevated priority levels for selecting the flits into the virtual channels and the egress, wherein the flits from the different ingress comprise different default and elevated weight.
    Type: Application
    Filed: December 13, 2022
    Publication date: May 16, 2024
    Applicant: SKYECHIP SDN BHD
    Inventors: YEONG TAT LIEW, YU YING ONG, SOON CHIEH LIM, WENG LI LEOW, CHEE HAK TEH
  • Publication number: 20240070039
    Abstract: The present invention relates to a method of debugging a targeted area or the whole network-on-chip (NOC) (101), whereby said targeted area or the whole NOC is triggered to enter into a freeze state before capturing of the state of the targeted area or the whole NOC (101) and unloading of the debug information, before finally said targeted area or the whole NOC is triggered to enter into an unfreeze state to allow forward progress to resume, using existing buffer storage, thus allowing user to debug and identify the source of issue without requiring a significant amount of extra storage.
    Type: Application
    Filed: October 7, 2022
    Publication date: February 29, 2024
    Inventors: Yu Ying ONG, Chee Hak TEH, Soon Chieh LIM, Weng Li LEOW, Muhamad Aidil BIN JAZMI, Yeong Tat LIEW
  • Publication number: 20070043964
    Abstract: Techniques that may be utilized in a multiprocessor system to reduce power consumption are described. In one embodiment, one or more internal components of a processor core are clocked at least partially by a frequency controlled clock signal.
    Type: Application
    Filed: August 22, 2005
    Publication date: February 22, 2007
    Inventors: Soon Lim, Loo Tan, Ying Liew
  • Publication number: 20060048156
    Abstract: A system and method includes providing a unified control store accessed by a plurality of engines. The control store includes a plurality of sequences of instructions. The system and method also includes assigning a program pointer for a particular engine. The program pointer points to a particular sequence of instructions. The system and method includes dynamically reassigning the program pointer to point to a different sequence of instructions.
    Type: Application
    Filed: April 2, 2004
    Publication date: March 2, 2006
    Inventors: Soon Lim, Ying Liew, Loo Tan