Abstract: A method for adjusting time-averaged (TA) parameters of a transmitting (TX) power of a radio module includes: obtaining at least one message of the at least one other radio module or at least one message of the radio module; determining a scenario of the TX power of the radio module according to the at least one message of the at least one other radio module or the at least one message of the radio module; determining whether the scenario is different from a predetermined scenario of the TX power of the radio module; and in response to the scenario being different from the predetermined scenario, adjusting the TA parameters according to the scenario.

Abstract: Systems and methods for efficiently identifying and extracting machine-actionable structured data from web documents are provided. The technology employs neural network architectures which process the raw HTML content of a set of seed websites to create transferrable models regarding information of interest. These models can then be applied to the raw HTML of other websites to identify similar information of interest. Data can thus be extracted across multiple websites in a functional, structured form that allows it to be used further by a processing system.

Abstract: The present invention demonstrated a Cre-loxP based cofilin-1 transgenic animal model to address the pathophysiological role of over-expressed cofilin-1 on systemic development.

Abstract: A package structure including a carrier, a photonic device, a supporting frame, and an encapsulant is provided. The photonic device is disposed on the carrier. The supporting frame is disposed on the carrier and surrounds the photonic device. The encapsulant covers the supporting frame and surrounds the photonic device.

Abstract: A ship navigation display system is set in a ship and includes a communications device, sensing device, first computing device, second computing device and wearable device. The communications device receives first coordinate information corresponding to a ship. The sensing device senses second coordinate information corresponding to a first ship around the ship. The first computing device is communicably connected with the communications device and calculates a collision probability according to the first and second coordinate information. When the collision probability is greater than a threshold value, the first computing device transmits a collision prediction signal. The second computing device receives the collision prediction signal and projects the second coordinate information corresponding to the first ship to a virtual coordinate in a virtual space.

Abstract: A backlight module includes a back board, a lamp board, a wavelength conversion film, an optical film, a coating layer and a reflective component. The back board includes a side wall. The lamp board is arranged on the back board, and includes plural light emitting units. The wavelength conversion film is arranged on the light emitting units. The optical film is arranged on the wavelength conversion film. The coating layer is arranged on the optical film, and adjacent to the optical film. The reflective component is arranged between the side wall and the optical film, and surrounds the wavelength conversion film and the optical film. At an optical wavelength of 450 nanometers, a brightness of a first surface of the reflective component is between 70 and 100, a first chromaticity thereof is between ?10 and 10, and a second chromaticity thereof is between ?10 and 10.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of light-emitting elements on a first substrate and forming a first pattern array on a second substrate, wherein the first pattern array includes an adhesive layer. The method also includes transferring the plurality of light-emitting elements from the first substrate to the second substrate and forming the first pattern array on a third substrate. The method includes transferring the plurality of light-emitting elements from the second substrate to the third substrate, and reducing an adhesion force of a portion of the adhesive layer. The method also includes forming a second pattern array on a fourth substrate, and transferring the plurality of light-emitting elements from the third substrate to the fourth substrate. The pitch between the plurality of light-emitting elements on the first substrate is different than the pitch of the first pattern array.

Abstract: A memory cell includes a memory device, a connecting structure, an insulating layer and a selector. The connecting structure is disposed on and electrically connected to the memory device. The insulating layer covers the memory device and the connecting structure. The selector is located on and electrically connected to the memory device, where the selector is disposed on the insulating layer and connected to the connecting structure by penetrating through the insulating layer.

Abstract: The present disclosure provides a method for preparing a hydrogel composition with thermos-sensitive and ionic reversible properties and the hydrogel composition prepared by the method. Related application products of the hydrogel composition of the present disclosure include wound dressings, drug carriers, three-dimensional cellular scaffolds, soluble microspheres, and cell capture and release systems, wherein the hydrogel composition with thermos-sensitive and ionic reversible properties has good in vitro and in vivo stability and high biocompatibility, and is non-toxic. The hydrogel composition can be removed and replaced by washing with metal chelating aqueous solution at low temperature.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.

Abstract: An organic light-emitting diode (OLED) display substrate, a manufacturing method thereof and a display panel are provided. The OLED display substrate has pixel regions and includes a base substrate and a pixel defining layer disposed on the base substrate; in regions of the pixel defining layer corresponding to the pixel regions, accommodation parts penetrating the pixel defining layer are disposed, and the pixel defining layer is further provided with guide parts disposed corresponding to the accommodation parts, the guide parts are located on a periphery of the corresponding accommodation parts and formed by recessed areas which are formed on a side of the pixel defining layer away from the base substrate, the recessed areas do not penetrate the pixel defining layer, and an orthographic projection of the guide part on the base substrate is directly coupled to an orthographic projection of the corresponding accommodation part on the base substrate.

Abstract: The present disclosure provides a method (100) in a network node advertising a Binding Segment Identifier, BSID. The method (100) includes: receiving (110) a first echo request packet containing a first target Forwarding Equivalence Class, FEC, stack including an FEC associated with the BSID; and transmitting (120), in response to a Time To Live, TTL, expiration associated with the first echo request packet, a first echo reply packet to an initiating network node initiating the first echo request packet, the first echo reply packet containing an indicator indicating that the FEC is to be replaced by a set of FECs.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of diodes on a first substrate and forming a first pattern array on a second substrate. The method also includes transferring the plurality of diodes from the first substrate to the second substrate. The method further includes forming the first pattern array on a third substrate. In addition, the method includes transferring the plurality of diodes from the second substrate to the third substrate. The method also includes forming a second pattern array on a fourth substrate. The method further includes transferring the plurality of diodes from the third substrate to the fourth substrate. The pitch between the plurality of diodes on the first substrate is different from the pitch of the first pattern array.

Abstract: An antiferroelectric field effect transistor (Anti-FeFET) of a memory cell includes an antiferroelectric layer instead of a ferroelectric layer. The antiferroelectric layer may operate based on a programmed state and an erased state in which the antiferroelectric layer is in a fully polarized alignment and a non-polarized alignment (or a random state of polarization), respectively. This enables the antiferroelectric layer in the FeFET to provide a sharper/larger voltage drop for an erase operation of the FeFET (e.g., in which the FeFET switches or transitions from the programmed state to the erased state) relative to a ferroelectric material layer that operates based on switching between two opposing fully polarized states.

Abstract: The present invention provides a digital load cell with redundancy design, the digital load cell including: at least one force measuring element that measures a load force applied to the digital load cell, where each force measuring element converts the load force into one analog signal; and one or more analog-to-digital conversion modules, where each force measuring element is connected to at least one analog-to-digital conversion module, and the analog-to-digital conversion module converts the analog signal into a digital signal. According to the digital load cell of the present invention, redundancy design is provided at least for both the force measuring element and the analog-to-digital conversion module, which can effectively ensure the proper operation of the digital load cell.

Abstract: A video editing method and apparatus, a computer readable storage medium, a device, and a computer program product are provided. The method includes: displaying a material addition page, in response to a preset edition operation for a first video editing template; acquiring a user material corresponding to the first video editing template, based on the material addition page; and generating a first video corresponding to the first video editing template according to the user material. The material description information corresponding to the first video editing template is displayed on the material addition page, and the material description information is used to describe a content feature of a user material. The first video is a video edited from the user material according to an editing operation indicated by the first video editing template.

Abstract: A light-emitting diode and a manufacturing method thereof are provided. The manufacturing method includes following steps. First, an LED wafer is provided. The LED wafer includes a substrate and a light-emitting semiconductor stacking structure positioned on the surface of the substrate. The light-emitting semiconductor stacking structure includes a first type semiconductor layer, an active layer, and a second type semiconductor layer from a side of the substrate. Second, dicing lanes are defined on the upper surface of the LED wafer. Third, dicing is performed along the dicing lanes of the substrate using a laser. The laser is focused on the lower surface of the substrate to form a surface hole and focused inside the substrate to form an internal hole. The diameter of the surface hole is greater than the diameter of the internal hole. Fourth, the LED wafer is separated into LED chips along the dicing lanes.

Abstract: A method of manufacturing a memory structure is provided. The method includes forming a first gate structure, a second gate structure, and a plurality of source/drain regions in a substrate, in which the plurality of source/drain regions are disposed on opposite sides of the first gate structure and the second gate structures; performing a dry etching process to form a trench between the first gate structure and the second gate structure; performing a wet etching process to expand the trench, in which the expanded trench has a hexagonal shaped cross section profile; and forming a bit line contact in the expanded trench.

Abstract: An integrated circuit (IC) device includes a substrate and a circuit region over the substrate. The circuit region includes at least one active region extending along a first direction, at least one gate region extending across the at least one active region and along a second direction transverse to the first direction, and at least one first input/output (IO) pattern configured to electrically couple the circuit region to external circuitry outside the circuit region. The at least one first IO pattern extends along a third direction oblique to both the first direction and the second direction.