Abstract: A calibrating method of a phase-locked loop circuit is provided. Firstly, a bias voltage of the phase-locked loop circuit is adjusted, so that the voltage controlled oscillator generates the oscillation signal with an initial frequency. Then, a charging current is used as a driving current and sent to a loop filter. Consequently, a tuned voltage is increased, and the frequency detector issues a first real count number. Then, a discharging current is used as the driving current and sent to the loop filter. Consequently, the tuned voltage is decreased, and the frequency detector issues a second real count number. Then, a ratio of a real loop gain to an ideal loop gain is calculated according to the first real count number and the second real count number. Moreover, a digital filter is adjusted according to the ratio.

Abstract: A power amplifier is provided. The power amplifier comprises a plurality of power amplifier units and a bias unit. The power amplifier units are connected in parallel with each other to receive a differential input signal. The power amplifier units perform a power amplifying so as to output a differential output signal. The bias unit is coupled to the power amplifier units and supplies a plurality of bias signals to the power amplifier units respectively. At least two of the power amplifier units are enable to operate in different class regions in according with the corresponding bias signals.

Abstract: A power amplifier is provided. The power amplifier comprises a plurality of power amplifier units and a bias unit. The power amplifier units are connected in parallel with each other to receive a differential input signal. The power amplifier units perform a power amplifying so as to output a differential output signal. The bias unit is coupled to the power amplifier units and supplies a plurality of bias signals to the power amplifier units respectively. At least two of the power amplifier units are enable to operate in different class regions in according with the corresponding bias signals.

Abstract: A RF front-end circuit and a low noise amplifier thereof configured for a receiver are provided. The circuit includes a low noise amplifier and a quadrature passive mixer. The low noise amplifier provides two RF output differential signals to the quadrature passive mixer. The RF signals are down-converted to the differential in-phase baseband signals and the differential quadrature-phase baseband signals. The structure of the RF front-end circuit can avoid the signal and noise interfering between in-phase channel and quadrature-phase channel without using a 25% duty cycle local oscillation generator circuit.

Abstract: A RF front-end circuit and a low noise amplifier thereof configured for a receiver are provided. The circuit includes a low noise amplifier and a quadrature passive mixer. The low noise amplifier provides two RF output differential signals to the quadrature passive mixer. The RF signals are down-converted to the differential in-phase baseband signals and the differential quadrature-phase baseband signals. The structure of the RF front-end circuit can avoid the signal and noise interfering between in-phase channel and quadrature-phase channel without using a 25% duty cycle local oscillation generator circuit.

Abstract: A variable gain amplifier (VGA) with a gain thereof exponential to a control voltage thereof. The variable gain amplifier (VGA) comprises an exponential DC converter, and a linear voltage multiplier. The exponential DC converter receives the control voltage and generates an exponential voltage which is exponential to the control voltage. The linear voltage multiplier is coupled to the exponential DC converter and has a gain proportional to the exponential voltage of the exponential DC converter.

Abstract: A variable gain amplifier (VGA) with a gain thereof exponential to a control voltage thereof. The variable gain amplifier (VGA) comprises an exponential DC converter, and a linear voltage multiplier. The exponential DC converter receives the control voltage and generates an exponential voltage which is exponential to the control voltage. The linear voltage multiplier is coupled to the exponential DC converter and has a gain proportional to the exponential voltage of the exponential DC converter.

Abstract: An up-conversion mixing system with high carrier suppression, which includes first and second LPFs to filter a first and a second input signals to thereby produce a first and a second filtered signals respectively; a first amplifier to amplify the first input signal and the first filtered signal to thereby produce a first amplified signal; a second amplifier to amplify the second input signal and the second filtered signal to thereby produce a second amplified signal, wherein the second amplifier is cross-coupled with the first amplifier in order to couple the first and the second amplified signals, thereby reducing a DC offset of a differential voltage output by the first and the second differential output terminals; and a switch to receive a differential local oscillation signal to shift the first and the second amplified signals up to frequencies associated with the local oscillation signal.

Abstract: A logic device with low electromagnetic interference. The logic device includes a digital logic gate, a voltage-limited circuit and a current-limited circuit. The digital logic gate provides a corresponding digital logic function. The voltage-limited circuit is connected to the digital logic gate in order to provide a fixed voltage to the digital logic gate to thus reduce an output voltage swing of the digital logic gate. The current-limited circuit is connected to the digital logic gate in order to provide a fixed current to the digital logic gate to thus reduce a transient current of the digital logic gate. Accordingly, an electromagnetic interface (EMI) caused by switching of the digital logic gate is reduced with the reduced output voltage swing and transient current.

Abstract: An amplification system capable of reducing DC offset in a baseband signal, which has first and second differential output terminals, first and second low pass filters, and first and second amplifiers. The first low pass filter filters a first input signal to thus generate a first filtered signal. The first amplifier amplifies the first input signal and the first filtered signal to thus generate a first amplified signal. The second low pass filter filters a second input signal to thus generate a second filtered signal. The second amplifier amplifies the second input signal and the second filtered signal to thus generate a second amplified signal. The system couples the first and second amplified signals at the first and the second differential output terminals to thus reduce the DC offset of a differential voltage signal output by the first and second differential output terminals.

Abstract: An up-conversion mixing system with high carrier suppression, which includes first and second LPFs to filter a first and a second input signals to thereby produce a first and a second filtered signals respectively; a first amplifier to amplify the first input signal and the first filtered signal to thereby produce a first amplified signal; a second amplifier to amplify the second input signal and the second filtered signal to thereby produce a second amplified signal, wherein the second amplifier is cross-coupled with the first amplifier in order to couple the first and the second amplified signals, thereby reducing a DC offset of a differential voltage output by the first and the second differential output terminals; and a switch to receive a differential local oscillation signal to shift the first and the second amplified signals up to frequencies associated with the local oscillation signal.

Abstract: A logic device with low electromagnetic interference. The logic device includes a digital logic gate, a voltage-limited circuit and a current-limited circuit. The digital logic gate provides a corresponding digital logic function. The voltage-limited circuit is connected to the digital logic gate in order to provide a fixed voltage to the digital logic gate to thus reduce an output voltage swing of the digital logic gate. The current-limited circuit is connected to the digital logic gate in order to provide a fixed current to the digital logic gate to thus reduce a transient current of the digital logic gate. Accordingly, an electromagnetic interface (EMI) caused by switching of the digital logic gate is reduced with the reduced output voltage swing and transient current.

Abstract: An amplification system capable of reducing DC offset in a baseband signal, which has first and second differential output terminals, first and second low pass filters, and first and second amplifiers. The first low pass filter filters a first input signal to thus generate a first filtered signal. The first amplifier amplifies the first input signal and the first filtered signal to thus generate a first amplified signal. The second low pass filter filters a second input signal to thus generate a second filtered signal. The second amplifier amplifies the second input signal and the second filtered signal to thus generate a second amplified signal. The system couples the first and second amplified signals at the first and the second differential output terminals to thus reduce the DC offset of a differential voltage signal output by the first and second differential output terminals.