Patents by Inventor Ying-Ting Chuang

Ying-Ting Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11998613
    Abstract: The present disclosure provides an immunoconjugate includes an antibody comprising an antigen-binding fragment that specifically binds to an epitope in mesothelin, N-glycan binding domain and an N-glycan; a linker linking to the N-glycan; and a payload A and a payload B conjugated to the linker, respectively; wherein the payload A and the payload B are the same or different. A pharmaceutical composition comprises the immunoconjugate and a method for treating cancer are also provided in the disclosure.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: June 4, 2024
    Assignee: DEVELOPMENT CENTER FOR BIOTECHNOLOGY
    Inventors: Shih-Hsien Chuang, Wei-Ting Sun, Ying-Shuan Lailee, Chun-Liang Lai, Wun-Huei Lin, Win-Yin Wei, Shih-Chong Tsai, Cheng-Chou Yu, Chao-Yang Huang
  • Patent number: 8352773
    Abstract: A time aligning circuit includes a plurality of buffers, a plurality of delay selectors, a plurality of adjustment symbol generators, and a controller. Each buffer receives an ordered set on a corresponding lane. Each delay selector delays an output of the ordered set of the corresponding buffer. Each adjustment symbol generator outputs an adjustment symbol or the output received from the corresponding delay selector according to an adjustment control signal. When an initial symbol of a designated delay selector is detected but initial symbols of other delay selectors are not received yet, the controller generates the delay control signal to the designated delay selector and generates the adjustment control signal to control a designated adjustment symbol generator corresponding to the designated delay selector in order to output one adjustment symbol until initial signals of all delay selectors are detected.
    Type: Grant
    Filed: August 11, 2010
    Date of Patent: January 8, 2013
    Assignee: JMicron Technology Corp.
    Inventors: Ying-Ting Chuang, Kuo-Kuang Chen
  • Publication number: 20110296073
    Abstract: A time aligning circuit includes a plurality of buffers, a plurality of delay selectors, a plurality of adjustment symbol generators, and a controller. Each buffer receives an ordered set on a corresponding lane. Each delay selector delays an output of the ordered set of the corresponding buffer. Each adjustment symbol generator outputs an adjustment symbol or the output received from the corresponding delay selector according to an adjustment control signal. When an initial symbol of a designated delay selector is detected but initial symbols of other delay selectors are not received yet, the controller generates the delay control signal to the designated delay selector and generates the adjustment control signal to control a designated adjustment symbol generator corresponding to the designated delay selector in order to output one adjustment symbol until initial signals of all delay selectors are detected.
    Type: Application
    Filed: August 11, 2010
    Publication date: December 1, 2011
    Inventors: Ying-Ting Chuang, Kuo-Kuang Chen