Patents by Inventor Yingkit Felix Tsui

Yingkit Felix Tsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240178211
    Abstract: A semiconductor device is provided. The semiconductor device comprises a first semiconductor die comprising a first capacitor, and a second semiconductor die in contact with the first semiconductor die and comprises a diode. The first semiconductor die and the second semiconductor die are arranged along a first direction, and a diode is configured to direct electrons accumulated at the first capacitor to a ground.
    Type: Application
    Filed: February 5, 2024
    Publication date: May 30, 2024
    Inventors: HSIN-LI CHENG, SHU-HUI SU, YU-CHI CHANG, YINGKIT FELIX TSUI, SHIH-FEN HUANG
  • Patent number: 11977256
    Abstract: Various embodiments of the present disclosure are directed towards a semiconductor package comprising optically coupled integrated circuit (IC) chips. A first IC chip and a second IC chip overlie a substrate at a center of the substrate. A photonic chip overlies the first and second IC chips and is electrically coupled to the second IC chip. A laser device chip overlies the substrate, adjacent to the photonic chip and the second IC chip, at a periphery of the substrate. The photonic chip is configured to modulate a laser beam from the laser device chip in accordance with an electrical signal from the second IC chip and to provide the modulated laser beam to the first IC chip. This facilitates optical communication between the first IC chip to the second IC chip. Various embodiments of the present disclosure are further directed towards simultaneously aligning and bonding constituents of the semiconductor package.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Tsung Shih, Hau-Yan Lu, Wei-Kang Liu, Yingkit Felix Tsui
  • Publication number: 20240113159
    Abstract: A semiconductor die included in a semiconductor die package may include a plurality of decoupling trench capacitor regions in a device region of the semiconductor die. At least two or more of the decoupling trench capacitor regions include decoupling trench capacitor structures having different depths. The depths of the decoupling trench capacitor structures in the decoupling trench capacitor regions may be selected to provide sufficient capacitance so as to satisfy circuit decoupling parameters for circuits of the semiconductor die package, while reducing the likelihood of warping, breaking, and/or cracking of the semiconductor die package.
    Type: Application
    Filed: January 6, 2023
    Publication date: April 4, 2024
    Inventors: Shu-Hui SU, Hsin-Li CHENG, YingKit Felix TSUI
  • Publication number: 20240113091
    Abstract: The present disclosure provides a package with a semiconductor structure and a method for manufacturing the semiconductor structure. In some embodiments, a photonic semiconductor structure includes a substrate having a first side and a second side opposite to each other, a first redistribution layer disposed on the first side, an interconnect structure disposed on the second side of the substrate, a metal reflector disposed in the interconnect structure, a dielectric layer disposed over the interconnect structure, and a grating coupler disposed in the dielectric layer and overlapping the metal reflector.
    Type: Application
    Filed: January 17, 2023
    Publication date: April 4, 2024
    Inventors: WEN-SHUN LO, JING-HWANG YANG, YINGKIT FELIX TSUI
  • Patent number: 11923352
    Abstract: A semiconductor device is provided. The semiconductor device comprises a first semiconductor die comprising a first capacitor, and a second semiconductor die in contact with the first semiconductor die and comprises a diode. The first semiconductor die and the second semiconductor die are arranged along a first direction, and a diode is configured to direct electrons accumulated at the first capacitor to a ground.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Hsin-Li Cheng, Shu-Hui Su, Yu-Chi Chang, Yingkit Felix Tsui, Shih-Fen Huang
  • Publication number: 20240045143
    Abstract: An optical waveguide structure of a semiconductor photonic device includes a first semiconductor waveguide, a second semiconductor waveguide, and an air seam between the first and second semiconductor waveguides. The semiconductor waveguides extend in a first direction, and a plurality of air seams extend in a second direction. Each of the air seams is disposed between two adjacent semiconductor waveguides. A distance between the two adjacent semiconductor waveguides is less than a width of each semiconductor waveguide.
    Type: Application
    Filed: August 3, 2022
    Publication date: February 8, 2024
    Inventors: CHIH-TSUNG SHIH, HAU-YAN LU, WEI-KANG LIU, YINGKIT FELIX TSUI
  • Publication number: 20240045141
    Abstract: A semiconductor structure includes a substrate, a grating coupler structure over the substrate, a multi-layers film structure over the grating coupler structure. The multi-layers film structure include a first layer including a first refractive index, a second layer over the first layer and including a second refractive index and a third layer over the second layer and including a third refractive index. The second refractive index is greater than the first refractive index and is greater than the third refractive index of the third layer, and a thickness of each layer of the multi-layers film structure is within a range from ?/4 to ?2, ? is a wavelength of light.
    Type: Application
    Filed: August 3, 2022
    Publication date: February 8, 2024
    Inventors: CHIH-TSUNG SHIH, WEI-KANG LIU, SUI-YING HSU, JING-HWANG YANG, YINGKIT FELIX TSUI
  • Publication number: 20240045240
    Abstract: A method includes receiving a silicon substrate; forming a first doped region and a second doped region in the silicon substrate; forming a third doped region and fourth doped region on upper portions of the first doped region and the second doped region, respectively; and patterning the silicon substrate to form an optical modulator. The optical modulator includes: a first section; a second section and a third section at least formed from the first and second doped regions, respectively; a fourth section, including a first height less than that of the first section and the second section and arranged between the first section and the second section, the fourth section being an undoped region; and a fifth section immediately adjacent to the fourth section, the fifth section including a height less than that of the first section and the second section and different from the first height.
    Type: Application
    Filed: August 2, 2022
    Publication date: February 8, 2024
    Inventors: CHIH-TSUNG SHIH, FENG YUAN, WEI-KANG LIU, YINGKIT FELIX TSUI
  • Publication number: 20240030359
    Abstract: The present disclosure provides a semiconductor device, including a first semiconductor structure and a second semiconductor structure. Each of the first semiconductor structure and the second semiconductor structure includes a substrate; a through silicon via, penetrating the substrate; and a deep trench capacitor, disposed in the substrate, separated from the TSV by a distance. The deep trench capacitor includes a stack, including a dielectric layer between a pair of conductive layers in a trench; and an insulating layer, covering the stack and the trench. The insulating layer surround a plurality of voids in the trench.
    Type: Application
    Filed: July 21, 2022
    Publication date: January 25, 2024
    Inventors: SHU-HUI SU, HSIN-LI CHENG, YINGKIT FELIX TSUI, YU-CHI CHANG, HSUAN-NING SHIH
  • Publication number: 20240019639
    Abstract: An edge coupler, a waveguide structure and a method for forming a waveguide structure are provided. The edge coupler includes a substrate, a first cladding layer, a core layer and a first anti-reflection coating layer. The first cladding layer has a second sidewall aligned with a first sidewall of the substrate. The core layer has a third sidewall aligned with the second sidewall. The anti-reflection coating layer lines the first sidewall, the second sidewall and the third sidewall. A thickness of the anti-reflection coating layer varies along the first sidewall, the second sidewall and the third sidewall.
    Type: Application
    Filed: July 13, 2022
    Publication date: January 18, 2024
    Inventors: WEI-KANG LIU, CHIH-TSUNG SHIH, HAU-YAN LU, YINGKIT FELIX TSUI
  • Publication number: 20240014254
    Abstract: Various embodiments of the present application are directed towards an integrated chip (IC). The IC comprises a trench capacitor overlying a substrate. The trench capacitor comprises a plurality of capacitor electrode structures, a plurality of warping reduction structures, and a plurality of capacitor dielectric structures. The plurality of capacitor electrode structures, the plurality of warping reduction structures, and the plurality of capacitor dielectric structures are alternatingly stacked and define a trench segment that extends vertically into the substrate. The plurality of capacitor electrode structures comprise a metal component and a nitrogen component. The plurality of warping reduction structures comprise the metal component, the nitrogen component, and an oxygen component.
    Type: Application
    Filed: July 11, 2022
    Publication date: January 11, 2024
    Inventors: Ting-Chen Hsu, Hsin-Li Cheng, Jyun-Ying Lin, Yingkit Felix Tsui, Shu-Hui Su, Shi-Min Wu
  • Publication number: 20240012199
    Abstract: Some implementations described herein include a photonics integrated circuit device including a photonics structure. The photonics structure includes a waveguide structure and an optical attenuator structure. In some implementation, the optical attenuator structure is formed on an end region of the waveguide structure and includes a metal material or a doped material. In some implementations, the optical attenuator structure includes a gaussian doping profile within a portion of the waveguide structure. The optical attenuator structure may absorb electromagnetic waves at the end of the waveguide structure with an efficiency that is improved relative to a spiral optical attenuator structure or metal cap optical attenuator structure.
    Type: Application
    Filed: July 8, 2022
    Publication date: January 11, 2024
    Inventors: Wei-kang LIU, Chih-Tsung SHIH, Hau-Yan LU, YingKit Felix TSUI, Lee-Shian JENG
  • Publication number: 20240004131
    Abstract: A semiconductor structure includes a waveguide and an optical attenuator. The waveguide is disposed over an insulating layer and configured to guide light. The optical attenuator is connected to the waveguide. The optical attenuator has a first surface and a second surface opposite the first surface, and a cross-sectional width of the optical attenuator decreases from the first surface to the second surface.
    Type: Application
    Filed: July 1, 2022
    Publication date: January 4, 2024
    Inventors: WEI-KANG LIU, LEE-SHIAN JENG, CHIH-TSUNG SHIH, HAU-YAN LU, YINGKIT FELIX TSUI
  • Publication number: 20230387241
    Abstract: A semiconductor device includes a substrate having a P-well region, an N-well region disposed on either side of and abutting the P-well region, and a deep N-well region disposed beneath and abutting both the P-well region and at least part of the N-well region on either side of the P-well region. The semiconductor device further includes a first conductive layer formed over a cathode region of the P-well region, where a Schottky barrier is formed at a junction of the first conductive layer and the P-well region. The semiconductor device further includes a second conductive layer formed over anode regions of the P-well region, where the anode regions are disposed on either side of the cathode region.
    Type: Application
    Filed: May 26, 2022
    Publication date: November 30, 2023
    Inventors: Wen-Shun LO, Yu-Chi CHANG, Yingkit Felix TSUI
  • Publication number: 20230387334
    Abstract: A method for manufacturing an integrated circuit device is provided. The method includes: providing a photonic structure including an insulating structure and an optical coupler embedded in the insulating structure; and removing a portion of the insulating structure to expose a coupling surface of the optical coupler and form a light reflective structure corresponding to the coupling surface.
    Type: Application
    Filed: May 26, 2022
    Publication date: November 30, 2023
    Inventors: WEI-KANG LIU, CHIH-TSUNG SHIH, HAU-YAN LU, YINGKIT FELIX TSUI
  • Publication number: 20230314718
    Abstract: Various embodiments of the present disclosure are directed towards an integrated circuit. The integrated circuit includes a substrate having an upper face and a lower face. The upper face includes a central region and an outer sidewall that laterally surrounds the central region and that extends from the upper face to the lower face. An optical edge coupler is disposed over the upper face of the substrate and extends in a first direction from the central region toward the outer sidewall. An outer sidewall of the optical edge coupler corresponds to the outer sidewall of the substrate and has a concave surface or a convex surface.
    Type: Application
    Filed: July 1, 2022
    Publication date: October 5, 2023
    Inventors: Wei-Kang Liu, Chih-Tsung Shih, Hau-Yan Lu, Yingkit Felix Tsui
  • Publication number: 20230296928
    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, a first dielectric layer, a second dielectric layer, a light modulator, a heater, and a first conductive contact. The first dielectric layer is disposed on the semiconductor substrate. The second dielectric layer is disposed on the first dielectric layer. The light modulator is disposed in the first dielectric layer. The heater is disposed in the second dielectric layer and above the light modulator. The first conductive contact is electrically connected to the light modulator. A top surface of the heater is coplanar with a top surface of the first conductive contact.
    Type: Application
    Filed: March 16, 2022
    Publication date: September 21, 2023
    Inventors: WEN-SHUN LO, YINGKIT FELIX TSUI
  • Publication number: 20230299073
    Abstract: A semiconductor structure includes a semiconductor substrate, a serpentine-shaped resistor, and a MOS transistor. The semiconductor substrate includes an isolation structure and an active region. The serpentine-shaped resistor is over the isolation structure. The serpentine-shaped resistor extends in a length direction and has a width that is equal to or greater than about 3.6 ?m in a width direction. The MOS transistor is over the active region of the semiconductor substrate.
    Type: Application
    Filed: March 17, 2022
    Publication date: September 21, 2023
    Inventors: LIANG-TAI KUO, HSIN-LI CHENG, YINGKIT FELIX TSUI
  • Publication number: 20230273367
    Abstract: Various embodiments of the present disclosure are directed towards a semiconductor package comprising optically coupled integrated circuit (IC) chips. A first IC chip and a second IC chip overlie a substrate at a center of the substrate. A photonic chip overlies the first and second IC chips and is electrically coupled to the second IC chip. A laser device chip overlies the substrate, adjacent to the photonic chip and the second IC chip, at a periphery of the substrate. The photonic chip is configured to modulate a laser beam from the laser device chip in accordance with an electrical signal from the second IC chip and to provide the modulated laser beam to the first IC chip. This facilitates optical communication between the first IC chip to the second IC chip. Various embodiments of the present disclosure are further directed towards simultaneously aligning and bonding constituents of the semiconductor package.
    Type: Application
    Filed: May 23, 2022
    Publication date: August 31, 2023
    Inventors: Chih-Tsung Shih, Hau-Yan Lu, Wei-Kang Liu, Yingkit Felix Tsui
  • Publication number: 20230246014
    Abstract: A semiconductor device is provided. The semiconductor device comprises a first semiconductor die comprising a first capacitor, and a second semiconductor die in contact with the first semiconductor die and comprises a diode. The first semiconductor die and the second semiconductor die are arranged along a first direction, and a diode is configured to direct electrons accumulated at the first capacitor to a ground.
    Type: Application
    Filed: January 28, 2022
    Publication date: August 3, 2023
    Inventors: HSIN-LI CHENG, SHU-HUI SU, YU-CHI CHANG, YINGKIT FELIX TSUI, SHIH-FEN HUANG