Patents by Inventor Yipeng Liu
Yipeng Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240179832Abstract: A multi-entry socket power delivery structure is attachable to a printed circuit board to provide improved delivery of one or more power supply signals to a socket. The power delivery structure provides an additional path for power supply signals to be delivered to a socket (in addition to the “power corridor” of the printed circuit board). The power delivery structure comprises one or more portions, with individual portions comprising a printed circuit board connection portion that attaches to the printed circuit board to receive a power supply signal generated by a voltage regulator, and a socket connection portion that attaches to the printed circuit board to deliver the power supply signal to the socket via the printed circuit board. The power delivery structure can be located in the recess of a reinforced backplate that provides structural integrity to a processor stack and associated thermal management solution loading mechanism.Type: ApplicationFiled: February 7, 2024Publication date: May 30, 2024Inventors: Phil Geng, Xiaoning Ye, Yipeng Zhong, Meng Wang, Hongfei Yan, Chuansheng Liu, Lejie Liu, Mohanraj Prabhugoud, Fernando Gonzalez Lenero, Dongwang Chen, Sanjoy Saha, Ralph Miele, Baris Bicen, David Shia, Jeffory Smalley, Eric Erike
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Publication number: 20240172503Abstract: The present disclosure provides a display panel, a method of manufacturing the same, and a display device. The initialization signal line layer in the display panel includes an initialization signal line pattern arranged in each of the plurality of sub-pixel areas; the first auxiliary signal line layer includes a plurality of first auxiliary signal line patterns corresponding to the plurality of sub-pixel areas in a one-to-one manner, and the first auxiliary signal line pattern is coupled to an initialization signal line pattern in a corresponding sub-pixel area, at least part of the first auxiliary signal line pattern extends along the first direction, and first auxiliary signal line patterns corresponding to sub-pixel areas in a same row of sub-pixel areas are sequentially coupled.Type: ApplicationFiled: February 1, 2024Publication date: May 23, 2024Inventors: Yipeng CHEN, Lujiang HUANGFU, Libin LIU
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Publication number: 20240161533Abstract: Some disclosed implementations include an ultrasonic sensor stack and an acoustic resonator. The acoustic resonator may be configured to enhance ultrasonic waves transmitted by the ultrasonic sensor stack in an ultrasonic frequency range that is suitable for ultrasonic fingerprint sensors. In some examples, the acoustic resonator may include one or more low-impedance layers residing between a first higher-impedance layer and a second higher-impedance layer. Each of the one or more low-impedance layers may have a lower acoustic impedance than an acoustic impedance of the first higher-impedance layer or an acoustic impedance of the second higher-impedance layer. At least one low-impedance layer may have a thickness corresponding to a multiple of a half wavelength at a peak frequency of the acoustic resonator. The peak frequency may be within a frequency range from 1 MHz. to 20 MHz.Type: ApplicationFiled: November 17, 2023Publication date: May 16, 2024Inventors: Jessica Liu STROHMANN, Hrishikesh Vijaykumar PANCHAWAGH, Nai-Kuei KUO, Yipeng LU, Ali LOPEZ, Kostadin Dimitrov DJORDJEV
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Publication number: 20240147801Abstract: The display substrate includes a base substrate and a plurality of pixel units disposed on the base substrate. Each of the pixel units is composed of 5 sub-pixels. The 5 sub-pixels include 1 red sub-pixel, 2 green sub-pixels, 1 blue sub-pixel and 1 white sub-pixel. Each of the sub-pixels includes a white light emitting unit. The red sub-pixel, the green sub-pixels and the blue sub-pixel further include color film layers corresponding to respective light emitting colors of the red sub-pixel, the green sub-pixels and the blue sub-pixel. The white sub-pixel is adjacent to the blue sub-pixel, and an aperture area of the blue sub-pixel is smaller than that of the green sub-pixels and smaller than that of the red sub-pixel.Type: ApplicationFiled: March 19, 2021Publication date: May 2, 2024Inventors: Yipeng CHEN, Rui LIU, Ling SHI
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Patent number: 11950468Abstract: The present disclosure provides a display panel, a method of manufacturing the same, and a display device. The initialization signal line layer in the display panel includes an initialization signal line pattern arranged in each of the plurality of sub-pixel areas; the first auxiliary signal line layer includes a plurality of first auxiliary signal line patterns corresponding to the plurality of sub-pixel areas in a one-to-one manner, and the first auxiliary signal line pattern is coupled to an initialization signal line pattern in a corresponding sub-pixel area, at least part of the first auxiliary signal line pattern extends along the first direction, and first auxiliary signal line patterns corresponding to sub-pixel areas in a same row of sub-pixel areas are sequentially coupled.Type: GrantFiled: April 15, 2021Date of Patent: April 2, 2024Assignee: BOE Technology Group Co., Ltd.Inventors: Yipeng Chen, Lujiang Huangfu, Libin Liu
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Patent number: 11946485Abstract: Some embodiments of the disclosure provide an air intake bypass recirculation structure with adjustable air entraining amount and controllable broadband noise which includes main body of the air intake bypass recirculation structure and an air entraining amount adjusting structure. In some examples, an air intake bypass recirculation cavity is formed in the main body of the air intake bypass recirculation structure. An air inlet of an air intake pipe and an air outlet of the air intake pipe are formed in two ends of the main body of the air intake bypass recirculation structure respectively. An airflow inlet of the air intake bypass recirculation structure and an airflow outlet of the air intake bypass recirculation structure are formed in the inner side of the main body of the air intake bypass recirculation structure. The air entraining amount adjusting structure is arranged in the air intake bypass recirculation cavity.Type: GrantFiled: August 14, 2023Date of Patent: April 2, 2024Assignee: Harbin Engineering UniversityInventors: Chen Liu, Zequn Ma, Yipeng Cao, Runze Zhang, Xinyu Zhang, Wenping Zhang, Jie Yang, Changhong Sun, Jie Guo, Xiaochen Zhao, Gongmin Liu
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Patent number: 11925087Abstract: Provided are a display substrate, a preparation method thereof, and a display apparatus. The display substrate includes: a first display region and a second display region; the first display region includes a plurality of first pixels, the first pixel includes a passive light-emitting device, the second display region includes a plurality of second pixels, the second pixel includes an active light-emitting device and a pixel drive circuit electrically connected to the active light-emitting device. The first display region further includes a plurality of first cathode blockers, and the first cathode blocker includes at least one first groove, wherein the first cathode blocker is provided between at least two adjacent columns of first pixels, to make the cathodes of the two adjacent columns of first pixels disconnected.Type: GrantFiled: October 29, 2020Date of Patent: March 5, 2024Assignee: BOE Technology Group Co., Ltd.Inventors: Yipeng Chen, Ling Shi, Ke Liu, Zhenhua Zhang
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Publication number: 20240070191Abstract: Music pushing method, apparatus, electronic device, and storage medium are provided by the embodiments of the present disclosure, for the method, firstly, a user end displays user information that satisfies a preset association relationship with music currently on a music playing interface in response to an operation acting on the music playing interface. In the present embodiments, upon inputting an operation instruction on target music by a user, information of other users who have taken an associated operation instruction to the target music and have an unrestricted friend relationship with the user is displayed, and by presenting music lists corresponding to other users, the user is guided to acquire music pushing information, and thus, ways for the user to acquire the music pushing information are expanded, and problems that music pushing is single and centralized as well as the pushing depends on a friend relationship are overcome.Type: ApplicationFiled: November 9, 2023Publication date: February 29, 2024Inventors: Yipeng HUANG, Chaopeng LIU, Yan YU, Jia QU, Wei ZHANG
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Publication number: 20230247197Abstract: Instructions embedded on a computer-readable medium, when executed on one or more computer devices, improve video coding performance while using a merge mode in motion estimation. The instructions comprise instructions to perform one or more refinement searches on a plurality of candidate regions of a current frame. The instructions also comprise instructions to determine one or more distortion values based, at least in part, on reduced candidate regions and instructions to code motion data based, at least in part, on the one or more refinement searches.Type: ApplicationFiled: April 6, 2023Publication date: August 3, 2023Applicant: OL Security Limited Liability CompanyInventors: Ujval J. Kapasi, Amit Gulati, John Sievers, Yipeng Liu, Dan Miller
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Patent number: 11665342Abstract: A method operates within an integrated circuit having a plurality of processing lanes. For each of a first and second processing lanes, the method determines a number of packed data words among one or more packed data words associated with the respective processing lane, associates the number of packed data words with a used field of the processing lane, wherein the used field indicates the number of packed data words in the processing lane; and stores the one or more packed data words in a variable record length memory based, at least in part, on the used field of the processing lane.Type: GrantFiled: November 16, 2020Date of Patent: May 30, 2023Assignee: OL Security Limited Liability CompanyInventors: Ujval J. Kapasi, Amit Gulati, John Seivers, Yipeng Liu, Dan Miller
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Patent number: 11418795Abstract: A temporal domain rate distortion optimization based on video content characteristic and QP-? correction provides the temporal domain rate distortion optimization based on the video content characteristic and the QP-? correction for a new generation encoder AV1, wherein according to a previous temporal domain dependency relationship under an HEVC-RA coding structure, a feature of the new generation encoder AV1 and a video sequence feature, an aggregation distortion of a current coding unit and an affected future coding unit is estimated and ta propagation factor of the current coding unit in a temporal domain distortion propagation model is calculated by constructing a temporal domain distortion propagation chain, wherein a Lagrange multiplier is adjusted through a more accurate propagation factor to realize a temporal domain dependency rate distortion optimization, and a relationship of QP-? is re-corrected and an I frame is adjusted to achieve a better coding effect.Type: GrantFiled: August 30, 2021Date of Patent: August 16, 2022Assignee: UNIVERSITY OF ELECTRONIC SCIENCE AND TECHNOLOGY OF CHINAInventors: Ce Zhu, Han Qin, Yonghua Wang, Yipeng Liu, Kai Liu
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Publication number: 20220046251Abstract: A temporal domain rate distortion optimization based on video content characteristic and QP-? correction provides the temporal domain rate distortion optimization based on the video content characteristic and the QP-? correction for a new generation encoder AV1, wherein according to a previous temporal domain dependency relationship under an HEVC-RA coding structure, a feature of the new generation encoder AV1 and a video sequence feature, an aggregation distortion of a current coding unit and an affected future coding unit is estimated and to propagation factor of the current coding unit in a temporal domain distortion propagation model is calculated by constructing a temporal domain distortion propagation chain, wherein a Lagrange multiplier is adjusted through a more accurate propagation factor to realize a temporal domain dependency rate distortion optimization, and a relationship of QP-? is re-corrected and an I frame is adjusted to achieve a better coding effectType: ApplicationFiled: August 30, 2021Publication date: February 10, 2022Applicant: University of Electronic Science and Technology of ChinaInventors: Ce ZHU, Han QIN, Yonghua WANG, Yipeng LIU, Kai LIU
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Publication number: 20210281839Abstract: A method operates within an integrated circuit having a plurality of processing lanes. For each of a first and second processing lanes, the method determines a number of packed data words among one or more packed data words associated with the respective processing lane, associates the number of packed data words with a used field of the processing lane, wherein the used field indicates the number of packed data words in the processing lane; and stores the one or more packed data words in a variable record length memory based, at least in part, on the used field of the processing lane.Type: ApplicationFiled: November 16, 2020Publication date: September 9, 2021Applicant: OL Security Limited Liability CompanyInventors: Ujval J. Kapasi, Amit Gulati, John Seivers, Yipeng Liu, Dan Miller
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Patent number: 10841579Abstract: A method operates within an integrated circuit having a plurality of processing lanes. For each of a first and second processing lanes, the method determines a number of packed data words among one or more packed data words associated with the respective processing lane, associates the number of packed data words with a used field of the processing lane, wherein the used field indicates the number of packed data words in the processing lane; and stores the one or more packed data words in a variable record length memory based, at least in part, on the used field of the processing lane.Type: GrantFiled: May 27, 2017Date of Patent: November 17, 2020Assignee: OL Security Limited LiabilityInventors: Ujval J. Kapasi, Amit Gulati, John Sievers, Yipeng Liu, Dan Miller
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Publication number: 20170264899Abstract: A method operates within an integrated circuit having a plurality of processing lanes. For each of a first and second processing lanes, the method determines a number of packed data words among one or more packed data words associated with the respective processing lane, associates the number of packed data words with a used field of the processing lane, wherein the used field indicates the number of packed data words in the processing lane; and stores the one or more packed data words in a variable record length memory based, at least in part, on the used field of the processing lane.Type: ApplicationFiled: May 27, 2017Publication date: September 14, 2017Applicant: OL Security Limited Liability CompanyInventors: Ujval J. Kapasi, Amit Gulati, John Seivers, Yipeng Liu, Dan Miller
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Patent number: 9667962Abstract: A method operates within an integrated circuit device having a plurality of processing lanes. The method determines a first number of packs among one or more first packs associated with a first processing lane of the plurality of processing lanes, associates the first number of packs with a first used field of the first processing lane, determines a second number of packs among one or more second packs associated with a second processing lane of the plurality of processing lanes, and associates the second number of packs with a second used field of the second processing lane.Type: GrantFiled: October 13, 2014Date of Patent: May 30, 2017Assignee: OL Security Limited Liability CompanyInventors: Ujval J. Kapasi, Amit Gulati, John Seivers, Yipeng Liu, Dan Miller
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Publication number: 20150030076Abstract: A method operates within an integrated circuit device having a plurality of processing lanes. The method determines a first number of packs among one or more first packs associated with a first processing lane of the plurality of processing lanes, associates the first number of packs with a first used field of the first processing lane, determines a second number of packs among one or more second packs associated with a second processing lane of the plurality of processing lanes, and associates the second number of packs with a second used field of the second processing lane.Type: ApplicationFiled: October 13, 2014Publication date: January 29, 2015Inventors: Ujval J. Kapasi, Amit Gulati, John Seivers, Yipeng Liu, Dan Miller
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Patent number: D885318Type: GrantFiled: August 27, 2018Date of Patent: May 26, 2020Inventors: Feng Wang, Yipeng Liu, Jingjing Liu, Hongling Feng, Xiaogang Ma, Haitao Sui
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Patent number: D892035Type: GrantFiled: August 27, 2018Date of Patent: August 4, 2020Inventors: Feng Wang, Hongling Feng, Jingjing Liu, Xueling Zhang, Yipeng Liu, Haitao Sui, Xiaogang Ma
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Patent number: D896742Type: GrantFiled: August 27, 2018Date of Patent: September 22, 2020Inventors: Feng Wang, Hongling Feng, Jingjing Liu, Xueling Zhang, Yipeng Liu, Haitao Sui, Xiaogang Ma