Patents by Inventor Yiwen Chen

Yiwen Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200238815
    Abstract: A power apparatus includes: an input shaft; an output shaft; a connecting mechanism; a first driving mechanism; a second driving mechanism of which an output end is fixedly connected with the input shaft; a first transmission component sleeved on the input shaft; a second transmission component sleeved on the output shaft; a third transmission component sleeved on the input shaft; a fourth transmission component sleeved on the output shaft; a changeover mechanism causing the first transmission component to rotate with rotation of the input shaft, the first transmission component rotating to drive the second transmission component to rotate, the output shaft rotating with the rotation of the second transmission component; or causing the third transmission component to rotate with rotation of the input shaft, the third transmission component rotating to drive the fourth transmission component to rotate, the output shaft rotating with the rotation of the fourth transmission component.
    Type: Application
    Filed: April 15, 2020
    Publication date: July 30, 2020
    Inventors: Zhangping YUAN, Hongbo CHEN, Aiguo CHEN, Yongxu HU, Li LI, Yiwen CHEN, Zhengchang DENG
  • Publication number: 20200097663
    Abstract: A storage unit of a computer includes: a product configuration information holding unit; a component-vulnerability correspondence holding unit indicating security holes; an asset information holding unit that stores asset values of the respective component of the product; a security countermeasure classification holding unit that stores defense target components for the respective security countermeasures and coefficients of countermeasure effects; and an attack map holding unit that stores attack maps indicating attack paths. A processing unit executes a program, to form: an information collection processing unit; an attack map creation processing unit that creates an attack map for each product; and a vulnerability evaluation processing unit that calculates priority order among countermeasures from threat levels of security holes of the respective components on the basis of the asset values.
    Type: Application
    Filed: September 19, 2019
    Publication date: March 26, 2020
    Applicant: CLARION CO., LTD.
    Inventors: Chinatsu SATO, Takashi KAWAUCHI, Eriko ANDO, Yasushi NAGAI, Tetsuhei YONEYAMA, Yiwen CHEN
  • Patent number: 8690703
    Abstract: A golf club has a head including a base layer and a compounded transfer layer. The base layer has a coupling face. The compounded transfer layer is formed on the coupling face of the base layer. The compounded transfer layer has a dye layer and a protection layer. The dye layer is sandwiched between the base layer and the protection layer.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: April 8, 2014
    Assignee: Fusheng Precision Co., Ltd
    Inventor: Yiwen Chen
  • Publication number: 20120046123
    Abstract: A golf club having a head is disclosed. The head comprises a base layer and a compounded transfer layer. The base layer has a coupling face. The compounded transfer layer is formed on the coupling face of the base layer. The compounded transfer layer has a dye layer and a protection layer. The dye layer is sandwiched between the base layer and the protection layer.
    Type: Application
    Filed: August 18, 2011
    Publication date: February 23, 2012
    Inventor: Yiwen Chen
  • Patent number: 7957365
    Abstract: A method and system for connection routing based on link utilization. A link utilization limit is accessed at a node of a network. The link utilization limit is compared to a utilization of a link coupled to the node. If the utilization of the link is greater than the link utilization limit, then the link is excluded from a virtual circuit.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: June 7, 2011
    Assignee: Cisco Technology, Inc.
    Inventors: Shawn Hsu, Rachel Yiwen Chen, Mana Palai
  • Publication number: 20110058378
    Abstract: An illumination device and a manufacture method thereof are provided. The illumination device includes a base, an illumination chip, and a sealant. The base has a surrounding side wall which encloses a containing space. The illumination chip is disposed within the containing space while the sealant fills the containing space and covers the illumination chip. The sealant has an outer surface which includes a center concave and a circular convex surrounding the center concave. The center concave is formed as a part of a spherical surface with no singular point. The connection between the center concave and the circular convex forms a circular ridge.
    Type: Application
    Filed: July 13, 2010
    Publication date: March 10, 2011
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Kuang-Hua Mei, Yiwen Chen, Hao-Liang Chao, Ci-Guang Peng
  • Publication number: 20090034532
    Abstract: A method and system for connection routing based on link utilization. A link utilization limit is accessed at a node of a network. The link utilization limit is compared to a utilization of a link coupled to the node. If the utilization of the link is greater than the link utilization limit, then the link is excluded from a virtual circuit.
    Type: Application
    Filed: September 30, 2008
    Publication date: February 5, 2009
    Applicant: Cisco Technology, Inc.
    Inventors: Shawn HSU, Rachel Yiwen Chen, Mana Palai
  • Patent number: 7443857
    Abstract: A method and system for connection routing based on link utilization. A link utilization limit is accessed at a node of a network. The link utilization limit is compared to a utilization of a link coupled to the node. If the utilization of the link is greater than the link utilization limit, then the link is excluded from a virtual circuit.
    Type: Grant
    Filed: July 9, 2003
    Date of Patent: October 28, 2008
    Assignee: Cisco Technology Inc.
    Inventors: Shawn Hsu, Rachel Yiwen Chen, Mana Palai
  • Patent number: 6943091
    Abstract: A deposition method for filling recesses in a substrate is described. In the method, the substrate is exposed to an energized deposition gas comprising first and second components, to deposit a first layer of a material in the recess, and thereafter, the ratio of the first component to the second component is reduced, to deposit a second layer of the material over the first layer in the recess. The deposition method may be used to fill recesses in a substrate and smoothen out reentrant cavities in a silicon nitride liner, in the fabrication of polysilicon gates in a substrate.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: September 13, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Hung-Tien Yu, Yiwen Chen
  • Patent number: 6617224
    Abstract: In a method of filling a trench in a substrate, a substrate is placed in a process zone, the substrate comprising a trench. A first deposition process is performed by providing a first gas into the process zone, maintaining first process conditions to deposit a first silicon oxide material in the trench in the substrate, and exhausting the first gas. Thereafter, a second deposition process is performed by providing a second gas into the process zone, maintaining second process conditions to deposit a second silicon oxide material to fill the trench and optionally overfill the trench, and exhausting the second gas. The multiple process deposition process allows the trench to be filled and overfilled with different types of silicon oxide materials to render the trench filling process more economical.
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: September 9, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Hung-Tien Yu, Yiwen Chen
  • Publication number: 20020055268
    Abstract: In a method of filling a trench in a substrate, a substrate is placed in a process zone, the substrate comprising a trench. A first deposition process is performed by providing a first gas into the process zone, maintaining first process conditions to deposit a first silicon oxide material in the trench in the substrate, and exhausting the first gas. Thereafter, a second deposition process is performed by providing a second gas into the process zone, maintaining second process conditions to deposit a second silicon oxide material to fill the trench and optionally overfill the trench, and exhausting the second gas. The multiple process deposition process allows the trench to be filled and overfilled with different types of silicon oxide materials to render the trench filling process more economical.
    Type: Application
    Filed: June 28, 2001
    Publication date: May 9, 2002
    Inventors: Hung-Tien Yu, Yiwen Chen
  • Publication number: 20020052128
    Abstract: A deposition method for filling recesses in a substrate is described. In the method, the substrate is exposed to an energized deposition gas comprising first and second components, to deposit a first layer of a material in the recess, and thereafter, the ratio of the first component to the second component is reduced, to deposit a second layer of the material over the first layer in the recess. The deposition method may be used to fill recesses in a substrate and smoothen out reentrant cavities in a silicon nitride liner, in the fabrication of polysilicon gates in a substrate.
    Type: Application
    Filed: July 12, 2001
    Publication date: May 2, 2002
    Inventors: Hung-Tien Yu, Yiwen Chen