Patents by Inventor Yoann Foucher

Yoann Foucher has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10503511
    Abstract: A processor is provided for use with a memory having selectable memory areas. In an example, the processor includes a memory area selection circuit (MMU) to select one of the selectable memory areas, and an instruction fetch circuit to fetch a target instruction at an address from the selected memory area. The processor includes an execution circuit (Pipeline) to execute instructions from the instruction fetch circuit and to execute a first instruction for changing the selection by the MMU to a second selectable memory area. The Pipeline executes a branch instruction that points to a target instruction, where access to the target instruction depends on actual change of selection to the second memory area. The processor also includes a logic circuit to ensure fetch of the target instruction in response to the branch instruction after actual change of selection. Other circuits, devices, systems, apparatus, and processes are also disclosed.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: December 10, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hiroyuki Mizuno, Yoann Foucher
  • Publication number: 20160274914
    Abstract: An electronic processor is provided for use with a memory (2530) having selectable memory areas. The processor includes a memory area selection circuit (MMU) operable to select one of the selectable memory areas at a time, and an instruction fetch circuit (2520, 2550) operable to fetch a target instruction at an address from the selected one of the selectable memory areas.
    Type: Application
    Filed: May 31, 2016
    Publication date: September 22, 2016
    Inventors: Hiroyuki Mizuno, Yoann Foucher
  • Patent number: 9384003
    Abstract: An electronic processor is provided for use with a memory (2530) having selectable memory areas. The processor includes a memory area selection circuit (MMU) operable to select one of the selectable memory areas at a time, and an instruction fetch circuit (2520, 2550) operable to fetch a target instruction at an address from the selected one of the selectable memory areas.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: July 5, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hiroyuki Mizuno, Yoann Foucher
  • Publication number: 20090106541
    Abstract: An electronic processor is provided for use with a memory (2530) having selectable memory areas. The processor includes a memory area selection circuit (MMU) operable to select one of the selectable memory areas at a time, and an instruction fetch circuit (2520, 2550) operable to fetch a target instruction at an address from the selected one of the selectable memory areas.
    Type: Application
    Filed: September 24, 2008
    Publication date: April 23, 2009
    Applicant: Texas Instruments Incorporated
    Inventors: Hiroyuki Mizuno, Yoann Foucher
  • Patent number: D1019726
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: March 26, 2024
    Assignee: COTY, INC.
    Inventors: Laurent Foucher, Wim Meulenkamp, Mariano Agustin Rodriguez-Fraticelli, Markus Gekeler, Yoann LeTensorer